arch,cpu,sim: Use PCStateBase in advancePC.
By using a PCStateBase pointer or reference, we can (mostly) avoid having to know what the ISA specific PState class is, letting the ISA specific instruction classes cast to the type they need internally. There are a couple minor places where we need to do those casts outside of ISA specific types, one in the generic NopStaticInstPtr class, and a few in generic faults. Right now, we'll just use the TheISA::PCState type in those isolated spots (sometimes hidden by auto), and deal with it later, possibly with a virtual "advance" method of some sort. Change-Id: I774c67dc648a85556230f601e087211b3d5630a9 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52043 Tested-by: kokoro <noreply+kokoro@google.com> Maintainer: Gabe Black <gabe.black@gmail.com> Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
This commit is contained in:
@@ -42,6 +42,7 @@
|
||||
#define __ARCH_ARM_MACROMEM_HH__
|
||||
|
||||
#include "arch/arm/insts/pred_inst.hh"
|
||||
#include "arch/arm/pcstate.hh"
|
||||
#include "arch/arm/tlb.hh"
|
||||
|
||||
namespace gem5
|
||||
@@ -75,14 +76,15 @@ class MicroOp : public PredOp
|
||||
|
||||
public:
|
||||
void
|
||||
advancePC(PCState &pcState) const override
|
||||
advancePC(PCStateBase &pcState) const override
|
||||
{
|
||||
auto &apc = pcState.as<PCState>();
|
||||
if (flags[IsLastMicroop]) {
|
||||
pcState.uEnd();
|
||||
apc.uEnd();
|
||||
} else if (flags[IsMicroop]) {
|
||||
pcState.uAdvance();
|
||||
apc.uAdvance();
|
||||
} else {
|
||||
pcState.advance();
|
||||
apc.advance();
|
||||
}
|
||||
}
|
||||
};
|
||||
@@ -96,14 +98,15 @@ class MicroOpX : public ArmStaticInst
|
||||
|
||||
public:
|
||||
void
|
||||
advancePC(PCState &pcState) const override
|
||||
advancePC(PCStateBase &pcState) const override
|
||||
{
|
||||
auto &apc = pcState.as<PCState>();
|
||||
if (flags[IsLastMicroop]) {
|
||||
pcState.uEnd();
|
||||
apc.uEnd();
|
||||
} else if (flags[IsMicroop]) {
|
||||
pcState.uAdvance();
|
||||
apc.uAdvance();
|
||||
} else {
|
||||
pcState.advance();
|
||||
apc.advance();
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
@@ -42,6 +42,7 @@
|
||||
#define __ARCH_ARM_MEM_HH__
|
||||
|
||||
#include "arch/arm/insts/pred_inst.hh"
|
||||
#include "arch/arm/pcstate.hh"
|
||||
|
||||
namespace gem5
|
||||
{
|
||||
@@ -57,14 +58,15 @@ class MightBeMicro : public PredOp
|
||||
{}
|
||||
|
||||
void
|
||||
advancePC(PCState &pcState) const override
|
||||
advancePC(PCStateBase &pcState) const override
|
||||
{
|
||||
auto &apc = pcState.as<PCState>();
|
||||
if (flags[IsLastMicroop]) {
|
||||
pcState.uEnd();
|
||||
apc.uEnd();
|
||||
} else if (flags[IsMicroop]) {
|
||||
pcState.uAdvance();
|
||||
apc.uAdvance();
|
||||
} else {
|
||||
pcState.advance();
|
||||
apc.advance();
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
@@ -40,6 +40,7 @@
|
||||
|
||||
#include "arch/arm/insts/misc64.hh"
|
||||
#include "arch/arm/insts/static_inst.hh"
|
||||
#include "arch/arm/pcstate.hh"
|
||||
|
||||
namespace gem5
|
||||
{
|
||||
@@ -75,14 +76,15 @@ class MightBeMicro64 : public ArmStaticInst
|
||||
{}
|
||||
|
||||
void
|
||||
advancePC(PCState &pcState) const override
|
||||
advancePC(PCStateBase &pcState) const override
|
||||
{
|
||||
auto &apc = pcState.as<PCState>();
|
||||
if (flags[IsLastMicroop]) {
|
||||
pcState.uEnd();
|
||||
apc.uEnd();
|
||||
} else if (flags[IsMicroop]) {
|
||||
pcState.uAdvance();
|
||||
apc.uAdvance();
|
||||
} else {
|
||||
pcState.advance();
|
||||
apc.advance();
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
@@ -42,6 +42,7 @@
|
||||
#define __ARCH_ARM_INSTS_PREDINST_HH__
|
||||
|
||||
#include "arch/arm/insts/static_inst.hh"
|
||||
#include "arch/arm/pcstate.hh"
|
||||
#include "base/compiler.hh"
|
||||
#include "base/logging.hh"
|
||||
#include "base/trace.hh"
|
||||
@@ -391,12 +392,13 @@ class PredMicroop : public PredOp
|
||||
}
|
||||
|
||||
void
|
||||
advancePC(PCState &pcState) const override
|
||||
advancePC(PCStateBase &pcState) const override
|
||||
{
|
||||
auto &apc = pcState.as<PCState>();
|
||||
if (flags[IsLastMicroop])
|
||||
pcState.uEnd();
|
||||
apc.uEnd();
|
||||
else
|
||||
pcState.uAdvance();
|
||||
apc.uAdvance();
|
||||
}
|
||||
};
|
||||
|
||||
|
||||
@@ -46,6 +46,7 @@
|
||||
#include "arch/arm/faults.hh"
|
||||
#include "arch/arm/utility.hh"
|
||||
#include "arch/arm/isa.hh"
|
||||
#include "arch/arm/pcstate.hh"
|
||||
#include "arch/arm/self_debug.hh"
|
||||
#include "arch/arm/system.hh"
|
||||
#include "base/trace.hh"
|
||||
@@ -197,9 +198,9 @@ class ArmStaticInst : public StaticInst
|
||||
uint64_t imm) const;
|
||||
|
||||
void
|
||||
advancePC(PCState &pcState) const override
|
||||
advancePC(PCStateBase &pcState) const override
|
||||
{
|
||||
pcState.advance();
|
||||
pcState.as<PCState>().advance();
|
||||
}
|
||||
|
||||
uint64_t getEMI() const override { return machInst; }
|
||||
|
||||
@@ -43,6 +43,7 @@
|
||||
#include <cmath>
|
||||
|
||||
#include "arch/arm/insts/misc.hh"
|
||||
#include "arch/arm/pcstate.hh"
|
||||
#include "arch/arm/regs/misc.hh"
|
||||
|
||||
namespace gem5
|
||||
@@ -853,14 +854,15 @@ class FpOp : public PredOp
|
||||
bool flush, uint32_t rMode) const;
|
||||
|
||||
void
|
||||
advancePC(PCState &pcState) const override
|
||||
advancePC(PCStateBase &pcState) const override
|
||||
{
|
||||
auto &apc = pcState.as<PCState>();
|
||||
if (flags[IsLastMicroop]) {
|
||||
pcState.uEnd();
|
||||
apc.uEnd();
|
||||
} else if (flags[IsMicroop]) {
|
||||
pcState.uAdvance();
|
||||
apc.uAdvance();
|
||||
} else {
|
||||
pcState.advance();
|
||||
apc.advance();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -59,9 +59,9 @@ output header {{
|
||||
ExtMachInst machInst;
|
||||
|
||||
void
|
||||
advancePC(MipsISA::PCState &pc) const override
|
||||
advancePC(PCStateBase &pc) const override
|
||||
{
|
||||
pc.advance();
|
||||
pc.as<PCState>().advance();
|
||||
}
|
||||
|
||||
PCState
|
||||
|
||||
@@ -29,6 +29,7 @@
|
||||
#ifndef __ARCH_POWER_INSTS_STATICINST_HH__
|
||||
#define __ARCH_POWER_INSTS_STATICINST_HH__
|
||||
|
||||
#include "arch/power/pcstate.hh"
|
||||
#include "arch/power/types.hh"
|
||||
#include "base/trace.hh"
|
||||
#include "cpu/static_inst.hh"
|
||||
@@ -68,9 +69,9 @@ class PowerStaticInst : public StaticInst
|
||||
Addr pc, const loader::SymbolTable *symtab) const override;
|
||||
|
||||
void
|
||||
advancePC(PowerISA::PCState &pcState) const override
|
||||
advancePC(PCStateBase &pc_state) const override
|
||||
{
|
||||
pcState.advance();
|
||||
pc_state.as<PCState>().advance();
|
||||
}
|
||||
|
||||
PCState
|
||||
|
||||
@@ -29,6 +29,7 @@
|
||||
|
||||
#include "arch/riscv/insts/static_inst.hh"
|
||||
|
||||
#include "arch/riscv/pcstate.hh"
|
||||
#include "arch/riscv/types.hh"
|
||||
#include "cpu/static_inst.hh"
|
||||
|
||||
@@ -39,12 +40,13 @@ namespace RiscvISA
|
||||
{
|
||||
|
||||
void
|
||||
RiscvMicroInst::advancePC(PCState &pcState) const
|
||||
RiscvMicroInst::advancePC(PCStateBase &pcState) const
|
||||
{
|
||||
auto &rpc = pcState.as<PCState>();
|
||||
if (flags[IsLastMicroop]) {
|
||||
pcState.uEnd();
|
||||
rpc.uEnd();
|
||||
} else {
|
||||
pcState.uAdvance();
|
||||
rpc.uAdvance();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -32,6 +32,7 @@
|
||||
|
||||
#include <string>
|
||||
|
||||
#include "arch/riscv/pcstate.hh"
|
||||
#include "arch/riscv/types.hh"
|
||||
#include "cpu/exec_context.hh"
|
||||
#include "cpu/static_inst.hh"
|
||||
@@ -57,7 +58,11 @@ class RiscvStaticInst : public StaticInst
|
||||
public:
|
||||
ExtMachInst machInst;
|
||||
|
||||
void advancePC(PCState &pc) const override { pc.advance(); }
|
||||
void
|
||||
advancePC(PCStateBase &pc) const override
|
||||
{
|
||||
pc.as<PCState>().advance();
|
||||
}
|
||||
|
||||
PCState
|
||||
buildRetPC(const PCState &curPC, const PCState &callPC) const override
|
||||
@@ -131,7 +136,7 @@ class RiscvMicroInst : public RiscvStaticInst
|
||||
flags[IsMicroop] = true;
|
||||
}
|
||||
|
||||
void advancePC(PCState &pcState) const override;
|
||||
void advancePC(PCStateBase &pcState) const override;
|
||||
};
|
||||
|
||||
} // namespace RiscvISA
|
||||
|
||||
@@ -101,12 +101,13 @@ class SparcMicroInst : public SparcStaticInst
|
||||
}
|
||||
|
||||
void
|
||||
advancePC(SparcISA::PCState &pcState) const override
|
||||
advancePC(PCStateBase &pc_state) const override
|
||||
{
|
||||
auto &spc = pc_state.as<PCState>();
|
||||
if (flags[IsLastMicroop])
|
||||
pcState.uEnd();
|
||||
spc.uEnd();
|
||||
else
|
||||
pcState.uAdvance();
|
||||
spc.uAdvance();
|
||||
}
|
||||
};
|
||||
|
||||
|
||||
@@ -29,6 +29,7 @@
|
||||
|
||||
#include "arch/sparc/insts/static_inst.hh"
|
||||
|
||||
#include "arch/sparc/pcstate.hh"
|
||||
#include "arch/sparc/regs/int.hh"
|
||||
#include "arch/sparc/regs/misc.hh"
|
||||
#include "base/bitunion.hh"
|
||||
@@ -79,9 +80,9 @@ SparcStaticInst::printRegArray(std::ostream &os, const RegId *indexArray,
|
||||
}
|
||||
|
||||
void
|
||||
SparcStaticInst::advancePC(SparcISA::PCState &pcState) const
|
||||
SparcStaticInst::advancePC(PCStateBase &pcState) const
|
||||
{
|
||||
pcState.advance();
|
||||
pcState.as<PCState>().advance();
|
||||
}
|
||||
|
||||
void
|
||||
|
||||
@@ -32,6 +32,7 @@
|
||||
|
||||
#include <cstdint>
|
||||
|
||||
#include "arch/sparc/pcstate.hh"
|
||||
#include "arch/sparc/types.hh"
|
||||
#include "base/trace.hh"
|
||||
#include "cpu/exec_context.hh"
|
||||
@@ -110,7 +111,7 @@ class SparcStaticInst : public StaticInst
|
||||
void printRegArray(std::ostream &os,
|
||||
const RegId *indexArray, int num) const;
|
||||
|
||||
void advancePC(PCState &pcState) const override;
|
||||
void advancePC(PCStateBase &pcState) const override;
|
||||
|
||||
static bool passesFpCondition(uint32_t fcc, uint32_t condition);
|
||||
static bool passesCondition(uint32_t codes, uint32_t condition);
|
||||
|
||||
@@ -39,6 +39,7 @@
|
||||
#define __ARCH_X86_INSTS_MICROOP_HH__
|
||||
|
||||
#include "arch/x86/insts/static_inst.hh"
|
||||
#include "arch/x86/pcstate.hh"
|
||||
#include "base/compiler.hh"
|
||||
|
||||
namespace gem5
|
||||
@@ -132,12 +133,13 @@ class X86MicroopBase : public X86StaticInst
|
||||
bool checkCondition(uint64_t flags, int condition) const;
|
||||
|
||||
void
|
||||
advancePC(PCState &pcState) const override
|
||||
advancePC(PCStateBase &pcState) const override
|
||||
{
|
||||
auto &xpc = pcState.as<PCState>();
|
||||
if (flags[IsLastMicroop])
|
||||
pcState.uEnd();
|
||||
xpc.uEnd();
|
||||
else
|
||||
pcState.uAdvance();
|
||||
xpc.uAdvance();
|
||||
}
|
||||
|
||||
PCState branchTarget(const PCState &branchPC) const override;
|
||||
|
||||
@@ -38,6 +38,7 @@
|
||||
#ifndef __ARCH_X86_INSTS_STATICINST_HH__
|
||||
#define __ARCH_X86_INSTS_STATICINST_HH__
|
||||
|
||||
#include "arch/x86/pcstate.hh"
|
||||
#include "arch/x86/types.hh"
|
||||
#include "base/trace.hh"
|
||||
#include "cpu/static_inst.hh"
|
||||
@@ -198,9 +199,9 @@ class X86StaticInst : public StaticInst
|
||||
}
|
||||
|
||||
void
|
||||
advancePC(PCState &pcState) const override
|
||||
advancePC(PCStateBase &pcState) const override
|
||||
{
|
||||
pcState.advance();
|
||||
pcState.as<PCState>().advance();
|
||||
}
|
||||
|
||||
PCState
|
||||
|
||||
@@ -28,6 +28,7 @@
|
||||
|
||||
#include "cpu/nop_static_inst.hh"
|
||||
|
||||
#include "arch/pcstate.hh"
|
||||
#include "cpu/static_inst.hh"
|
||||
|
||||
namespace gem5
|
||||
@@ -48,9 +49,9 @@ class NopStaticInst : public StaticInst
|
||||
}
|
||||
|
||||
void
|
||||
advancePC(TheISA::PCState &pcState) const override
|
||||
advancePC(PCStateBase &pcState) const override
|
||||
{
|
||||
pcState.advance();
|
||||
pcState.as<TheISA::PCState>().advance();
|
||||
}
|
||||
|
||||
std::string
|
||||
|
||||
@@ -320,7 +320,7 @@ class StaticInst : public RefCounted, public StaticInstFlags
|
||||
panic("completeAcc not defined!");
|
||||
}
|
||||
|
||||
virtual void advancePC(TheISA::PCState &pc_state) const = 0;
|
||||
virtual void advancePC(PCStateBase &pc_state) const = 0;
|
||||
|
||||
virtual TheISA::PCState
|
||||
buildRetPC(const TheISA::PCState &cur_pc,
|
||||
|
||||
Reference in New Issue
Block a user