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arch: Disable unused read/write code overrides in the ISA parser.

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Some operand types had read/write code overrides, I think largely by
pattern matching other operand types, and not because that code was
actually expected to be used or to work. Instead, we should just assert
that that code isn't used and remove the implementation. This method of
affecting reading and writing code is going away anyway, and if this is
needed in the future it can be replaced in the new system.

Change-Id: Idae886153aa343570109069cbe54e2c1699a34e5
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49736
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Gabe Black
2021-08-22 00:53:13 -07:00
parent 2bd99f141e
commit 543035e90d
1 changed files with 2 additions and 6 deletions
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8
src/arch/isa_parser/operand_types.py
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@@ -341,9 +341,7 @@ class VecRegOperand(RegOperand):
return c_read
def makeReadW(self, predWrite):
func = 'getWritableRegOperand'
if self.read_code != None:
return self.buildReadCode(predWrite, func)
assert(self.read_code == None)
if predWrite:
rindex = '_destIndex++'
@@ -454,9 +452,7 @@ class VecPredRegOperand(RegOperand):
return c_read
def makeReadW(self, predWrite):
func = 'getWritableRegOperand'
if self.read_code != None:
return self.buildReadCode(predWrite, 'getWritableRegOperand')
assert(self.read_code == None)
if predWrite:
rindex = '_destIndex++'