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base, sim: Make ByteOrder into a ScopedEnum accessible to Python

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There is currently no good way of passing a byte order as a Param
since the ByteOrder type is defined in C++. Make this into a generated
ScopedEnum that can be used in Params.

Change-Id: I990f402340c17c4e0799de57df19516ae61794d4
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33174
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
This commit is contained in:
Andreas Sandberg
2020-08-21 11:53:18 +01:00
parent 2ea459e6cd
commit 51992fa80a
43 changed files with 233 additions and 228 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/dev/arm/amba_device.cc
View File

@@ -81,6 +81,6 @@ AmbaDevice::readId(PacketPtr pkt, uint64_t amba_id, Addr pio_addr)
(amba_id >> byte) & 0xFF,
pkt->getAddr() - pio_addr, byte);
pkt->setUintX((amba_id >> byte) & 0xFF, LittleEndianByteOrder);
pkt->setUintX((amba_id >> byte) & 0xFF, ByteOrder::little);
return true;
}

4
src/dev/arm/fvp_base_pwr_ctrl.cc
View File

@@ -151,7 +151,7 @@ FVPBasePwrCtrl::read(PacketPtr pkt)
DPRINTF(FVPBasePwrCtrl, "FVPBasePwrCtrl::read: 0x%x<-0x%x(%i)\n", resp,
addr, size);
pkt->setUintX(resp, LittleEndianByteOrder);
pkt->setUintX(resp, ByteOrder::little);
pkt->makeResponse();
return pioDelay;
}
@@ -163,7 +163,7 @@ FVPBasePwrCtrl::write(PacketPtr pkt)
const size_t size = pkt->getSize();
panic_if(size != 4, "FVPBasePwrCtrl::write: Invalid size %i\n", size);
uint64_t data = pkt->getUintX(LittleEndianByteOrder);
uint64_t data = pkt->getUintX(ByteOrder::little);
// Software may use the power controller to check for core presence
// If core is not present, return an invalid MPID as notification

8
src/dev/arm/generic_timer.cc
View File

@@ -999,7 +999,7 @@ GenericTimerFrame::read(PacketPtr pkt)
DPRINTF(Timer, "GenericTimerFrame::read: 0x%x<-0x%x(%i) [S = %u]\n", resp,
addr, size, is_sec);
pkt->setUintX(resp, LittleEndianByteOrder);
pkt->setUintX(resp, ByteOrder::little);
pkt->makeResponse();
return 0;
}
@@ -1014,7 +1014,7 @@ GenericTimerFrame::write(PacketPtr pkt)
"GenericTimerFrame::write: Invalid size %i\n", size);
bool to_el0 = false;
const uint64_t data = pkt->getUintX(LittleEndianByteOrder);
const uint64_t data = pkt->getUintX(ByteOrder::little);
Addr offset = 0;
if (timerRange.contains(addr)) {
offset = addr - timerRange.start();
@@ -1313,7 +1313,7 @@ GenericTimerMem::read(PacketPtr pkt)
DPRINTF(Timer, "GenericTimerMem::read: 0x%x<-0x%x(%i) [S = %u]\n", resp,
addr, size, is_sec);
pkt->setUintX(resp, LittleEndianByteOrder);
pkt->setUintX(resp, ByteOrder::little);
pkt->makeResponse();
return 0;
}
@@ -1327,7 +1327,7 @@ GenericTimerMem::write(PacketPtr pkt)
panic_if(size != 4 && size != 8,
"GenericTimerMem::write: Invalid size %i\n", size);
const uint64_t data = pkt->getUintX(LittleEndianByteOrder);
const uint64_t data = pkt->getUintX(ByteOrder::little);
if (counterCtrlRange.contains(addr))
counterCtrlWrite(addr - counterCtrlRange.start(), size, data, is_sec);
else if (counterStatusRange.contains(addr))

4
src/dev/arm/gic_v3.cc
View File

@@ -127,7 +127,7 @@ Gicv3::read(PacketPtr pkt)
panic("Gicv3::read(): unknown address %#x\n", addr);
}
pkt->setUintX(resp, LittleEndianByteOrder);
pkt->setUintX(resp, ByteOrder::little);
pkt->makeAtomicResponse();
return delay;
}
@@ -136,7 +136,7 @@ Tick
Gicv3::write(PacketPtr pkt)
{
const size_t size = pkt->getSize();
uint64_t data = pkt->getUintX(LittleEndianByteOrder);
uint64_t data = pkt->getUintX(ByteOrder::little);
const Addr addr = pkt->getAddr();
bool is_secure_access = pkt->isSecure();
Tick delay = 0;

2
src/dev/arm/gic_v3_its.cc
View File

@@ -882,7 +882,7 @@ Gicv3Its::read(PacketPtr pkt)
}
}
pkt->setUintX(value, LittleEndianByteOrder);
pkt->setUintX(value, ByteOrder::little);
pkt->makeAtomicResponse();
return pioDelay;
}

2
src/dev/arm/hdlcd.cc
View File

@@ -434,7 +434,7 @@ PixelConverter
HDLcd::pixelConverter() const
{
ByteOrder byte_order(
pixel_format.big_endian ? BigEndianByteOrder : LittleEndianByteOrder);
pixel_format.big_endian ? ByteOrder::big : ByteOrder::little);
/* Some Linux kernels have a broken driver that swaps the red and
* blue color select registers. */

6
src/dev/arm/kmi.cc
View File

@@ -95,7 +95,7 @@ Pl050::read(PacketPtr pkt)
default:
if (readId(pkt, ambaId, pioAddr)) {
// Hack for variable size accesses
data = pkt->getUintX(LittleEndianByteOrder);
data = pkt->getUintX(ByteOrder::little);
break;
}
@@ -103,7 +103,7 @@ Pl050::read(PacketPtr pkt)
break;
}
pkt->setUintX(data, LittleEndianByteOrder);
pkt->setUintX(data, ByteOrder::little);
pkt->makeAtomicResponse();
return pioDelay;
}
@@ -115,7 +115,7 @@ Pl050::write(PacketPtr pkt)
assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
Addr daddr = pkt->getAddr() - pioAddr;
const uint32_t data = pkt->getUintX(LittleEndianByteOrder);
const uint32_t data = pkt->getUintX(ByteOrder::little);
panic_if(pkt->getSize() != 1,
"PL050: Unexpected write size "

2
src/dev/arm/pl011.cc
View File

@@ -137,7 +137,7 @@ Pl011::read(PacketPtr pkt)
default:
if (readId(pkt, AMBA_ID, pioAddr)) {
// Hack for variable size accesses
data = pkt->getUintX(LittleEndianByteOrder);
data = pkt->getUintX(ByteOrder::little);
break;
}

10
src/dev/arm/pl111.cc
View File

@@ -182,7 +182,7 @@ Pl111::read(PacketPtr pkt)
default:
if (readId(pkt, AMBA_ID, pioAddr)) {
// Hack for variable size accesses
data = pkt->getUintX(LittleEndianByteOrder);
data = pkt->getUintX(ByteOrder::little);
break;
} else if (daddr >= CrsrImage && daddr <= 0xBFC) {
// CURSOR IMAGE
@@ -203,7 +203,7 @@ Pl111::read(PacketPtr pkt)
}
}
pkt->setUintX(data, LittleEndianByteOrder);
pkt->setUintX(data, ByteOrder::little);
pkt->makeAtomicResponse();
return pioDelay;
}
@@ -215,7 +215,7 @@ Pl111::write(PacketPtr pkt)
// use a temporary data since the LCD registers are read/written with
// different size operations
//
const uint32_t data = pkt->getUintX(LittleEndianByteOrder);
const uint32_t data = pkt->getUintX(ByteOrder::little);
assert(pkt->getAddr() >= pioAddr &&
pkt->getAddr() < pioAddr + pioSize);
@@ -383,13 +383,13 @@ Pl111::pixelConverter() const
bytesPerPixel,
offsets[2], offsets[1], offsets[0],
rw, gw, bw,
LittleEndianByteOrder);
ByteOrder::little);
} else {
return PixelConverter(
bytesPerPixel,
offsets[0], offsets[1], offsets[2],
rw, gw, bw,
LittleEndianByteOrder);
ByteOrder::little);
}
}

2
src/dev/arm/rtc_pl031.cc
View File

@@ -90,7 +90,7 @@ PL031::read(PacketPtr pkt)
default:
if (readId(pkt, ambaId, pioAddr)) {
// Hack for variable sized access
data = pkt->getUintX(LittleEndianByteOrder);
data = pkt->getUintX(ByteOrder::little);
break;
}
panic("Tried to read PL031 at offset %#x that doesn't exist\n", daddr);

6
src/dev/arm/watchdog_sp805.cc
View File

@@ -93,7 +93,7 @@ Sp805::read(PacketPtr pkt)
break;
default:
if (readId(pkt, ambaId, pioAddr))
resp = pkt->getUintX(LittleEndianByteOrder);
resp = pkt->getUintX(ByteOrder::little);
else
warn("Sp805::read: Unexpected address (0x%x:%i), assuming RAZ\n",
addr, size);
@@ -101,7 +101,7 @@ Sp805::read(PacketPtr pkt)
DPRINTF(Sp805, "Sp805::read: 0x%x<-0x%x(%i)\n", resp, addr, size);
pkt->setUintX(resp, LittleEndianByteOrder);
pkt->setUintX(resp, ByteOrder::little);
pkt->makeResponse();
return pioDelay;
}
@@ -113,7 +113,7 @@ Sp805::write(PacketPtr pkt)
const size_t size = pkt->getSize();
panic_if(size != 4, "Sp805::write: Invalid size %i\n", size);
uint64_t data = pkt->getUintX(LittleEndianByteOrder);
uint64_t data = pkt->getUintX(ByteOrder::little);
switch (addr) {
case WDOGLOAD:
if (writeAccessEnabled) {

2
src/dev/serial/simple.cc
View File

@@ -44,7 +44,7 @@
SimpleUart::SimpleUart(const SimpleUartParams *p)
: Uart(p, p->pio_size),
byteOrder(p->big_endian ? BigEndianByteOrder : LittleEndianByteOrder),
byteOrder(p->big_endian ? ByteOrder::big : ByteOrder::little),
endOnEOT(p->end_on_eot)
{
}