There is currently no good way of passing a byte order as a Param since the ByteOrder type is defined in C++. Make this into a generated ScopedEnum that can be used in Params. Change-Id: I990f402340c17c4e0799de57df19516ae61794d4 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33174 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Gabe Black <gabeblack@google.com>
303 lines
9.7 KiB
C++
303 lines
9.7 KiB
C++
/*
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* Copyright (c) 2019-2020 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Copyright (c) 2018 Metempsy Technology Consulting
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "dev/arm/gic_v3.hh"
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#include "cpu/intr_control.hh"
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#include "debug/GIC.hh"
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#include "debug/Interrupt.hh"
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#include "dev/arm/gic_v3_cpu_interface.hh"
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#include "dev/arm/gic_v3_distributor.hh"
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#include "dev/arm/gic_v3_its.hh"
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#include "dev/arm/gic_v3_redistributor.hh"
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#include "dev/platform.hh"
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#include "mem/packet.hh"
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#include "mem/packet_access.hh"
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Gicv3::Gicv3(const Params * p)
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: BaseGic(p)
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{
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}
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void
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Gicv3::init()
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{
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distributor = new Gicv3Distributor(this, params()->it_lines);
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int threads = sys->threads.size();
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redistributors.resize(threads, nullptr);
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cpuInterfaces.resize(threads, nullptr);
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panic_if(threads > params()->cpu_max,
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"Exceeding maximum number of PEs supported by GICv3: "
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"using %u while maximum is %u.", threads, params()->cpu_max);
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for (int i = 0; i < threads; i++) {
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redistributors[i] = new Gicv3Redistributor(this, i);
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cpuInterfaces[i] = new Gicv3CPUInterface(this, i);
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}
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distRange = RangeSize(params()->dist_addr,
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Gicv3Distributor::ADDR_RANGE_SIZE - 1);
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redistSize = redistributors[0]->addrRangeSize;
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redistRange = RangeSize(params()->redist_addr, redistSize * threads - 1);
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addrRanges = {distRange, redistRange};
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distributor->init();
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for (int i = 0; i < threads; i++) {
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redistributors[i]->init();
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cpuInterfaces[i]->init();
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}
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Gicv3Its *its = params()->its;
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if (its)
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its->setGIC(this);
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BaseGic::init();
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}
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Tick
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Gicv3::read(PacketPtr pkt)
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{
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const Addr addr = pkt->getAddr();
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const size_t size = pkt->getSize();
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bool is_secure_access = pkt->isSecure();
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uint64_t resp = 0;
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Tick delay = 0;
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if (distRange.contains(addr)) {
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const Addr daddr = addr - distRange.start();
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panic_if(!distributor, "Distributor is null!");
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resp = distributor->read(daddr, size, is_secure_access);
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delay = params()->dist_pio_delay;
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DPRINTF(GIC, "Gicv3::read(): (distributor) context_id %d register %#x "
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"size %d is_secure_access %d (value %#x)\n",
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pkt->req->contextId(), daddr, size, is_secure_access, resp);
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} else if (redistRange.contains(addr)) {
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Addr daddr = (addr - redistRange.start()) % redistSize;
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Gicv3Redistributor *redist = getRedistributorByAddr(addr);
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resp = redist->read(daddr, size, is_secure_access);
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delay = params()->redist_pio_delay;
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DPRINTF(GIC, "Gicv3::read(): (redistributor %d) context_id %d "
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"register %#x size %d is_secure_access %d (value %#x)\n",
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redist->processorNumber(), pkt->req->contextId(), daddr, size,
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is_secure_access, resp);
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} else {
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panic("Gicv3::read(): unknown address %#x\n", addr);
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}
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pkt->setUintX(resp, ByteOrder::little);
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pkt->makeAtomicResponse();
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return delay;
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}
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Tick
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Gicv3::write(PacketPtr pkt)
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{
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const size_t size = pkt->getSize();
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uint64_t data = pkt->getUintX(ByteOrder::little);
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const Addr addr = pkt->getAddr();
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bool is_secure_access = pkt->isSecure();
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Tick delay = 0;
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if (distRange.contains(addr)) {
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const Addr daddr = addr - distRange.start();
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panic_if(!distributor, "Distributor is null!");
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DPRINTF(GIC, "Gicv3::write(): (distributor) context_id %d "
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"register %#x size %d is_secure_access %d value %#x\n",
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pkt->req->contextId(), daddr, size, is_secure_access, data);
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distributor->write(daddr, data, size, is_secure_access);
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delay = params()->dist_pio_delay;
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} else if (redistRange.contains(addr)) {
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Addr daddr = (addr - redistRange.start()) % redistSize;
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Gicv3Redistributor *redist = getRedistributorByAddr(addr);
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DPRINTF(GIC, "Gicv3::write(): (redistributor %d) context_id %d "
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"register %#x size %d is_secure_access %d value %#x\n",
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redist->processorNumber(), pkt->req->contextId(), daddr, size,
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is_secure_access, data);
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redist->write(daddr, data, size, is_secure_access);
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delay = params()->redist_pio_delay;
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} else {
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panic("Gicv3::write(): unknown address %#x\n", addr);
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}
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pkt->makeAtomicResponse();
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return delay;
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}
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void
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Gicv3::sendInt(uint32_t int_id)
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{
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DPRINTF(Interrupt, "Gicv3::sendInt(): received SPI %d\n", int_id);
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distributor->sendInt(int_id);
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}
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void
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Gicv3::clearInt(uint32_t int_id)
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{
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DPRINTF(Interrupt, "Gicv3::clearInt(): received SPI %d\n", int_id);
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distributor->clearInt(int_id);
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}
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void
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Gicv3::sendPPInt(uint32_t int_id, uint32_t cpu)
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{
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panic_if(cpu >= redistributors.size(), "Invalid cpuID sending PPI!");
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DPRINTF(Interrupt, "Gicv3::sendPPInt(): received PPI %d cpuTarget %#x\n",
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int_id, cpu);
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redistributors[cpu]->sendPPInt(int_id);
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}
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void
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Gicv3::clearPPInt(uint32_t int_id, uint32_t cpu)
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{
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panic_if(cpu >= redistributors.size(), "Invalid cpuID clearing PPI!");
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DPRINTF(Interrupt, "Gicv3::clearPPInt(): received PPI %d cpuTarget %#x\n",
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int_id, cpu);
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redistributors[cpu]->clearPPInt(int_id);
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}
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void
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Gicv3::postInt(uint32_t cpu, ArmISA::InterruptTypes int_type)
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{
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platform->intrctrl->post(cpu, int_type, 0);
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ArmSystem::callClearStandByWfi(sys->threads[cpu]);
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}
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bool
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Gicv3::supportsVersion(GicVersion version)
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{
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return (version == GicVersion::GIC_V3) ||
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(version == GicVersion::GIC_V4 && params()->gicv4);
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}
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void
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Gicv3::deassertInt(uint32_t cpu, ArmISA::InterruptTypes int_type)
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{
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platform->intrctrl->clear(cpu, int_type, 0);
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}
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void
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Gicv3::deassertAll(uint32_t cpu)
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{
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platform->intrctrl->clearAll(cpu);
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}
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bool
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Gicv3::haveAsserted(uint32_t cpu) const
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{
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return platform->intrctrl->havePosted(cpu);
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}
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Gicv3Redistributor *
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Gicv3::getRedistributorByAffinity(uint32_t affinity) const
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{
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for (auto & redistributor : redistributors) {
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if (redistributor->getAffinity() == affinity) {
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return redistributor;
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}
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}
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return nullptr;
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}
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Gicv3Redistributor *
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Gicv3::getRedistributorByAddr(Addr addr) const
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{
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panic_if(!redistRange.contains(addr),
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"Address not pointing to a valid redistributor\n");
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const Addr daddr = addr - redistRange.start();
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const uint32_t redistributor_id = daddr / redistSize;
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panic_if(redistributor_id >= redistributors.size(),
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"Invalid redistributor_id!");
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panic_if(!redistributors[redistributor_id], "Redistributor is null!");
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return redistributors[redistributor_id];
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}
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void
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Gicv3::serialize(CheckpointOut & cp) const
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{
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distributor->serializeSection(cp, "distributor");
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for (uint32_t redistributor_id = 0;
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redistributor_id < redistributors.size(); redistributor_id++)
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redistributors[redistributor_id]->serializeSection(cp,
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csprintf("redistributors.%i", redistributor_id));
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for (uint32_t cpu_interface_id = 0;
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cpu_interface_id < cpuInterfaces.size(); cpu_interface_id++)
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cpuInterfaces[cpu_interface_id]->serializeSection(cp,
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csprintf("cpuInterface.%i", cpu_interface_id));
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}
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void
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Gicv3::unserialize(CheckpointIn & cp)
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{
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getSystem()->setGIC(this);
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distributor->unserializeSection(cp, "distributor");
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for (uint32_t redistributor_id = 0;
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redistributor_id < redistributors.size(); redistributor_id++)
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redistributors[redistributor_id]->unserializeSection(cp,
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csprintf("redistributors.%i", redistributor_id));
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for (uint32_t cpu_interface_id = 0;
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cpu_interface_id < cpuInterfaces.size(); cpu_interface_id++)
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cpuInterfaces[cpu_interface_id]->unserializeSection(cp,
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csprintf("cpuInterface.%i", cpu_interface_id));
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}
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Gicv3 *
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Gicv3Params::create()
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{
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return new Gicv3(this);
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}
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