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cpu: Add HtmCpu DebugFlag

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JIRA: https://gem5.atlassian.net/browse/GEM5-587

Change-Id: Id4b86b8964bc64bce1d2e4af941217eb114f3cc4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30320
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Timothy Hayes
2020-01-13 10:26:18 +00:00
committed by Giacomo Travaglini
parent 45c6d160b6
commit 511b53387a
1 changed files with 13 additions and 0 deletions
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13
src/cpu/SConscript
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@@ -1,5 +1,17 @@
# -*- mode:python -*-
# Copyright (c) 2020 ARM Limited
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
# not be construed as granting a license to any other intellectual
# property including but not limited to intellectual property relating
# to a hardware implementation of the functionality of the software
# licensed hereunder. You may use the software subject to the license
# terms below provided that you ensure that this notice is replicated
# unmodified and in its entirety in all distributions of the software,
# modified or unmodified, in source code or in binary form.
#
# Copyright (c) 2006 The Regents of The University of Michigan
# All rights reserved.
#
@@ -51,6 +63,7 @@ DebugFlag('ExecKernel', 'Filter: Trace kernel mode instructions')
DebugFlag('ExecAsid', 'Format: Include ASID in trace')
DebugFlag('ExecFlags', 'Format: Include instruction flags in trace')
DebugFlag('Fetch')
DebugFlag('HtmCpu', 'Hardware Transactional Memory (CPU side)')
DebugFlag('IntrControl')
DebugFlag('O3PipeView')
DebugFlag('PCEvent')