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dev-arm: Fix pci_mem_base setting in VExpress_GEM5_Base

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This was not actually used and DTB was generated using an hardcoded
value.

Change-Id: Ie8fd63495df5cb56418593cf0dd5432dc2992eac
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27288
Tested-by: Gem5 Cloud Project GCB service account <345032938727@cloudbuild.gserviceaccount.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
This commit is contained in:
Giacomo Travaglini
2020-03-20 19:41:29 +00:00
parent ae69a12b3b
commit 4f6b8f1d71
1 changed files with 2 additions and 1 deletions
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3
src/dev/arm/RealView.py
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@@ -160,7 +160,7 @@ class GenericArmPciHost(GenericPciHost):
# AXI memory address range
ranges += self.pciFdtAddr(space=2, addr=0)
ranges += state.addrCells(0x40000000) # Fixed offset
ranges += state.addrCells(self.pci_mem_base)
ranges += local_state.sizeCells(0x40000000) # Fixed size
node.append(FdtPropertyWords("ranges", ranges))
@@ -1025,6 +1025,7 @@ Interrupts:
pci_host = GenericArmPciHost(
conf_base=0x30000000, conf_size='256MB', conf_device_bits=12,
pci_pio_base=0x2f000000,
pci_mem_base=0x40000000,
int_policy="ARM_PCI_INT_DEV", int_base=100, int_count=4)
energy_ctrl = EnergyCtrl(pio_addr=0x10000000)