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mem-ruby,configs: Update AMD protos with new names

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Update the MOESI_AMD_Base and GPU_VIPER configuration files with the new
full protocol-specific names for the controllers instead of the
deprecated names.

Note: If you have any files which use the `CntrlBase` base, you will
likely need to update the class names that you are inheriting from.

Change-Id: I623fea7dd4cd151f7b15fe7cb43f8a4c45492d89
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
This commit is contained in:
Jason Lowe-Power
2024-10-23 17:16:32 -07:00
committed by Bobby R. Bruce
parent d1ed308af8
commit 4f53451073
3 changed files with 11 additions and 12 deletions
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2
configs/example/gpufs/Disjoint_VIPER.py
View File

@@ -119,7 +119,7 @@ class Disjoint_VIPER(RubySystem):
dma_cntrls = []
for i, dma_device in enumerate(dma_devices):
dma_seq = DMASequencer(version=i, ruby_system=self)
dma_cntrl = DMA_Controller(
dma_cntrl = GPU_VIPER_DMA_Controller(
version=i, dma_sequencer=dma_seq, ruby_system=self
)

15
configs/ruby/GPU_VIPER.py
View File

@@ -101,7 +101,7 @@ class L2Cache(RubyCache):
self.replacement_policy = TreePLRURP()
class CPCntrl(CorePair_Controller, CntrlBase):
class CPCntrl(GPU_VIPER_CorePair_Controller, CntrlBase):
def create(self, options, ruby_system, system):
self.version = self.versionCount()
@@ -153,7 +153,7 @@ class TCPCache(RubyCache):
self.replacement_policy = ObjectList.rp_list.get(options.tcp_rp)()
class TCPCntrl(TCP_Controller, CntrlBase):
class TCPCntrl(GPU_VIPER_TCP_Controller, CntrlBase):
def create(self, options, ruby_system, system):
self.version = self.versionCount()
@@ -246,7 +246,7 @@ class SQCCache(RubyCache):
self.replacement_policy = ObjectList.rp_list.get(options.sqc_rp)()
class SQCCntrl(SQC_Controller, CntrlBase):
class SQCCntrl(GPU_VIPER_SQC_Controller, CntrlBase):
def create(self, options, ruby_system, system):
self.version = self.versionCount()
@@ -309,7 +309,7 @@ class TCC(RubyCache):
self.replacement_policy = ObjectList.rp_list.get(options.tcc_rp)()
class TCCCntrl(TCC_Controller, CntrlBase):
class TCCCntrl(GPU_VIPER_TCC_Controller, CntrlBase):
def create(self, options, ruby_system, system):
self.version = self.versionCount()
self.L2cache = TCC(
@@ -348,8 +348,7 @@ class L3Cache(RubyCache):
self.replacement_policy = TreePLRURP()
# unused in GPU_VIPER; see git blame for discussion
class L3Cntrl(L3Cache_Controller, CntrlBase):
class L3Cntrl(GPU_VIPER_L3Cache_Controller, CntrlBase):
def create(self, options, ruby_system, system):
self.version = self.versionCount()
self.L3cache = L3Cache()
@@ -380,7 +379,7 @@ class L3Cntrl(L3Cache_Controller, CntrlBase):
self.respToL3 = resp_to_l3
class DirCntrl(Directory_Controller, CntrlBase):
class DirCntrl(GPU_VIPER_Directory_Controller, CntrlBase):
def create(self, options, dir_ranges, ruby_system, system):
self.version = self.versionCount()
@@ -1096,7 +1095,7 @@ def create_system(
for i, dma_device in enumerate(dma_devices):
dma_seq = DMASequencer(version=i, ruby_system=ruby_system)
dma_cntrl = DMA_Controller(
dma_cntrl = GPU_VIPER_DMA_Controller(
version=i, dma_sequencer=dma_seq, ruby_system=ruby_system
)
exec("system.dma_cntrl%d = dma_cntrl" % i)

6
configs/ruby/MOESI_AMD_Base.py
View File

@@ -99,7 +99,7 @@ class L2Cache(RubyCache):
self.replacement_policy = TreePLRURP()
class CPCntrl(CorePair_Controller, CntrlBase):
class CPCntrl(MOESI_AMD_Base_CorePair_Controller, CntrlBase):
def create(self, options, ruby_system, system):
self.version = self.versionCount()
@@ -156,7 +156,7 @@ class L3Cache(RubyCache):
self.replacement_policy = TreePLRURP()
class L3Cntrl(L3Cache_Controller, CntrlBase):
class L3Cntrl(MOESI_AMD_Base_L3Cache_Controller, CntrlBase):
def create(self, options, ruby_system, system):
self.version = self.versionCount()
self.L3cache = L3Cache()
@@ -187,7 +187,7 @@ class L3Cntrl(L3Cache_Controller, CntrlBase):
self.respToL3 = resp_to_l3
class DirCntrl(Directory_Controller, CntrlBase):
class DirCntrl(MOESI_AMD_Base_Directory_Controller, CntrlBase):
def create(self, options, dir_ranges, ruby_system, system):
self.version = self.versionCount()