derek/gem5
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

misc: Rename Enums namespace as enums

Browse Source 
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::Enums became ::enums.

Change-Id: I39b5fb48817ad16abbac92f6254284b37fc90c40
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45420
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Daniel R. Carvalho
2021-05-06 16:18:58 -03:00
committed by Daniel Carvalho
parent 06fb0753fe
commit 4dd099ba3d
77 changed files with 384 additions and 381 deletions
Download Patch File Download Diff File Expand all files Collapse all files

42
src/gpu-compute/compute_unit.cc
View File

@@ -1230,7 +1230,7 @@ ComputeUnit::injectGlobalMemFence(GPUDynInstPtr gpuDynInst,
RequestPtr req)
{
assert(gpuDynInst->isGlobalSeg() ||
gpuDynInst->executedAs() == Enums::SC_GLOBAL);
gpuDynInst->executedAs() == enums::SC_GLOBAL);
if (!req) {
req = std::make_shared<Request>(
@@ -1452,13 +1452,13 @@ ComputeUnit::DTLBPort::recvTimingResp(PacketPtr pkt)
Addr last = 0;
switch(computeUnit->prefetchType) {
case Enums::PF_CU:
case enums::PF_CU:
last = computeUnit->lastVaddrCU[mp_index];
break;
case Enums::PF_PHASE:
case enums::PF_PHASE:
last = computeUnit->lastVaddrSimd[simdId][mp_index];
break;
case Enums::PF_WF:
case enums::PF_WF:
last = computeUnit->lastVaddrWF[simdId][wfSlotId][mp_index];
default:
break;
@@ -1477,7 +1477,7 @@ ComputeUnit::DTLBPort::recvTimingResp(PacketPtr pkt)
computeUnit->lastVaddrSimd[simdId][mp_index] = vaddr;
computeUnit->lastVaddrWF[simdId][wfSlotId][mp_index] = vaddr;
stride = (computeUnit->prefetchType == Enums::PF_STRIDE) ?
stride = (computeUnit->prefetchType == enums::PF_STRIDE) ?
computeUnit->prefetchStride: stride;
DPRINTF(GPUPrefetch, "%#x to: CU[%d][%d][%d][%d]\n", vaddr,
@@ -1836,28 +1836,28 @@ ComputeUnit::updateInstStats(GPUDynInstPtr gpuDynInst)
if (gpuDynInst->isLoad()) {
switch (gpuDynInst->executedAs()) {
case Enums::SC_SPILL:
case enums::SC_SPILL:
stats.spillReads++;
break;
case Enums::SC_GLOBAL:
case enums::SC_GLOBAL:
stats.globalReads++;
break;
case Enums::SC_GROUP:
case enums::SC_GROUP:
stats.groupReads++;
break;
case Enums::SC_PRIVATE:
case enums::SC_PRIVATE:
stats.privReads++;
break;
case Enums::SC_READONLY:
case enums::SC_READONLY:
stats.readonlyReads++;
break;
case Enums::SC_KERNARG:
case enums::SC_KERNARG:
stats.kernargReads++;
break;
case Enums::SC_ARG:
case enums::SC_ARG:
stats.argReads++;
break;
case Enums::SC_NONE:
case enums::SC_NONE:
/**
* this case can occur for flat mem insts
* who execute with EXEC = 0
@@ -1869,28 +1869,28 @@ ComputeUnit::updateInstStats(GPUDynInstPtr gpuDynInst)
}
} else if (gpuDynInst->isStore()) {
switch (gpuDynInst->executedAs()) {
case Enums::SC_SPILL:
case enums::SC_SPILL:
stats.spillWrites++;
break;
case Enums::SC_GLOBAL:
case enums::SC_GLOBAL:
stats.globalWrites++;
break;
case Enums::SC_GROUP:
case enums::SC_GROUP:
stats.groupWrites++;
break;
case Enums::SC_PRIVATE:
case enums::SC_PRIVATE:
stats.privWrites++;
break;
case Enums::SC_READONLY:
case enums::SC_READONLY:
stats.readonlyWrites++;
break;
case Enums::SC_KERNARG:
case enums::SC_KERNARG:
stats.kernargWrites++;
break;
case Enums::SC_ARG:
case enums::SC_ARG:
stats.argWrites++;
break;
case Enums::SC_NONE:
case enums::SC_NONE:
/**
* this case can occur for flat mem insts
* who execute with EXEC = 0

2
src/gpu-compute/compute_unit.hh
View File

@@ -334,7 +334,7 @@ class ComputeUnit : public ClockedObject
std::vector<Addr> lastVaddrCU;
std::vector<std::vector<Addr>> lastVaddrSimd;
std::vector<std::vector<std::vector<Addr>>> lastVaddrWF;
Enums::PrefetchType prefetchType;
enums::PrefetchType prefetchType;
EXEC_POLICY exec_policy;
bool debugSegFault;

20
src/gpu-compute/gpu_dyn_inst.cc
View File

@@ -281,7 +281,7 @@ GPUDynInst::seqNum() const
return _seqNum;
}
Enums::StorageClassType
enums::StorageClassType
GPUDynInst::executedAs()
{
return _staticInst->executed_as;
@@ -741,11 +741,11 @@ GPUDynInst::doApertureCheck(const VectorMask &mask)
if (mask[lane]) {
if (computeUnit()->shader->isLdsApe(addr[lane])) {
// group segment
staticInstruction()->executed_as = Enums::SC_GROUP;
staticInstruction()->executed_as = enums::SC_GROUP;
break;
} else if (computeUnit()->shader->isScratchApe(addr[lane])) {
// private segment
staticInstruction()->executed_as = Enums::SC_PRIVATE;
staticInstruction()->executed_as = enums::SC_PRIVATE;
break;
} else if (computeUnit()->shader->isGpuVmApe(addr[lane])) {
// we won't support GPUVM
@@ -757,18 +757,18 @@ GPUDynInst::doApertureCheck(const VectorMask &mask)
addr[lane]);
} else {
// global memory segment
staticInstruction()->executed_as = Enums::SC_GLOBAL;
staticInstruction()->executed_as = enums::SC_GLOBAL;
break;
}
}
}
// we should have found the segment
assert(executedAs() != Enums::SC_NONE);
assert(executedAs() != enums::SC_NONE);
// flat accesses should not straddle multiple APEs so we
// must check that all addresses fall within the same APE
if (executedAs() == Enums::SC_GROUP) {
if (executedAs() == enums::SC_GROUP) {
for (int lane = 0; lane < computeUnit()->wfSize(); ++lane) {
if (mask[lane]) {
// if the first valid addr we found above was LDS,
@@ -776,7 +776,7 @@ GPUDynInst::doApertureCheck(const VectorMask &mask)
assert(computeUnit()->shader->isLdsApe(addr[lane]));
}
}
} else if (executedAs() == Enums::SC_PRIVATE) {
} else if (executedAs() == enums::SC_PRIVATE) {
for (int lane = 0; lane < computeUnit()->wfSize(); ++lane) {
if (mask[lane]) {
// if the first valid addr we found above was private,
@@ -813,7 +813,7 @@ GPUDynInst::resolveFlatSegment(const VectorMask &mask)
// 2. Set the execUnitId based an the aperture check.
// 3. Decrement any extra resources that were reserved. Other
// resources are released as normal, below.
if (executedAs() == Enums::SC_GLOBAL) {
if (executedAs() == enums::SC_GLOBAL) {
// no transormation for global segment
wavefront()->execUnitId = wavefront()->flatGmUnitId;
if (isLoad()) {
@@ -826,7 +826,7 @@ GPUDynInst::resolveFlatSegment(const VectorMask &mask)
} else {
panic("Invalid memory operation!\n");
}
} else if (executedAs() == Enums::SC_GROUP) {
} else if (executedAs() == enums::SC_GROUP) {
for (int lane = 0; lane < wavefront()->computeUnit->wfSize(); ++lane) {
if (mask[lane]) {
// flat address calculation goes here.
@@ -846,7 +846,7 @@ GPUDynInst::resolveFlatSegment(const VectorMask &mask)
} else {
panic("Invalid memory operation!\n");
}
} else if (executedAs() == Enums::SC_PRIVATE) {
} else if (executedAs() == enums::SC_PRIVATE) {
/**
* Flat instructions may resolve to the private segment (scratch),
* which is backed by main memory and provides per-lane scratch

2
src/gpu-compute/gpu_dyn_inst.hh
View File

@@ -159,7 +159,7 @@ class GPUDynInst : public GPUExecContext
InstSeqNum seqNum() const;
Enums::StorageClassType executedAs();
enums::StorageClassType executedAs();
// virtual address for scalar memory operations
Addr scalarAddr;

2
src/gpu-compute/gpu_static_inst.cc
View File

@@ -36,7 +36,7 @@
#include "debug/GPUInst.hh"
GPUStaticInst::GPUStaticInst(const std::string &opcode)
: executed_as(Enums::SC_NONE), _opcode(opcode),
: executed_as(enums::SC_NONE), _opcode(opcode),
_instNum(0), _instAddr(0), srcVecDWords(-1), dstVecDWords(-1),
srcScalarDWords(-1), dstScalarDWords(-1), maxOpSize(-1)
{

16
src/gpu-compute/gpu_static_inst.hh
View File

@@ -237,25 +237,25 @@ class GPUStaticInst : public GPUStaticInstFlags
static uint64_t dynamic_id_count;
// For flat memory accesses
Enums::StorageClassType executed_as;
enums::StorageClassType executed_as;
void setFlag(Flags flag) {
_flags[flag] = true;
if (isGroupSeg()) {
executed_as = Enums::SC_GROUP;
executed_as = enums::SC_GROUP;
} else if (isGlobalSeg()) {
executed_as = Enums::SC_GLOBAL;
executed_as = enums::SC_GLOBAL;
} else if (isPrivateSeg()) {
executed_as = Enums::SC_PRIVATE;
executed_as = enums::SC_PRIVATE;
} else if (isSpillSeg()) {
executed_as = Enums::SC_SPILL;
executed_as = enums::SC_SPILL;
} else if (isReadOnlySeg()) {
executed_as = Enums::SC_READONLY;
executed_as = enums::SC_READONLY;
} else if (isKernArgSeg()) {
executed_as = Enums::SC_KERNARG;
executed_as = enums::SC_KERNARG;
} else if (isArgSeg()) {
executed_as = Enums::SC_ARG;
executed_as = enums::SC_ARG;
}
}
const std::string& opcode() const { return _opcode; }

10
src/gpu-compute/wavefront.cc
View File

@@ -565,7 +565,7 @@ bool
Wavefront::isGmInstruction(GPUDynInstPtr ii)
{
if (ii->isGlobalMem() ||
(ii->isFlat() && ii->executedAs() == Enums::SC_GLOBAL)) {
(ii->isFlat() && ii->executedAs() == enums::SC_GLOBAL)) {
return true;
}
@@ -576,7 +576,7 @@ bool
Wavefront::isLmInstruction(GPUDynInstPtr ii)
{
if (ii->isLocalMem() ||
(ii->isFlat() && ii->executedAs() == Enums::SC_GROUP)) {
(ii->isFlat() && ii->executedAs() == enums::SC_GROUP)) {
return true;
}
@@ -1058,9 +1058,9 @@ Wavefront::exec()
bool flat_as_gm = false;
bool flat_as_lm = false;
if (ii->isFlat()) {
flat_as_gm = (ii->executedAs() == Enums::SC_GLOBAL) ||
(ii->executedAs() == Enums::SC_PRIVATE);
flat_as_lm = (ii->executedAs() == Enums::SC_GROUP);
flat_as_gm = (ii->executedAs() == enums::SC_GLOBAL) ||
(ii->executedAs() == enums::SC_PRIVATE);
flat_as_lm = (ii->executedAs() == enums::SC_GROUP);
}
// Single precision ALU or Branch or Return or Special instruction