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misc: Rename Enums namespace as enums

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As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::Enums became ::enums.

Change-Id: I39b5fb48817ad16abbac92f6254284b37fc90c40
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45420
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Daniel R. Carvalho
2021-05-06 16:18:58 -03:00
committed by Daniel Carvalho
parent 06fb0753fe
commit 4dd099ba3d
77 changed files with 384 additions and 381 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
src/cpu/testers/traffic_gen/base.cc
View File

@@ -414,7 +414,7 @@ BaseTrafficGen::createDram(Tick duration,
unsigned int num_seq_pkts, unsigned int page_size,
unsigned int nbr_of_banks,
unsigned int nbr_of_banks_util,
Enums::AddrMap addr_mapping,
enums::AddrMap addr_mapping,
unsigned int nbr_of_ranks)
{
return std::shared_ptr<BaseGen>(new DramGen(*this, requestorId,
@@ -439,7 +439,7 @@ BaseTrafficGen::createDramRot(Tick duration,
unsigned int page_size,
unsigned int nbr_of_banks,
unsigned int nbr_of_banks_util,
Enums::AddrMap addr_mapping,
enums::AddrMap addr_mapping,
unsigned int nbr_of_ranks,
unsigned int max_seq_count_per_rank)
{
@@ -473,7 +473,7 @@ BaseTrafficGen::createHybrid(Tick duration,
unsigned int buffer_size_nvm,
unsigned int nbr_of_banks_nvm,
unsigned int nbr_of_banks_util_nvm,
Enums::AddrMap addr_mapping,
enums::AddrMap addr_mapping,
unsigned int nbr_of_ranks_dram,
unsigned int nbr_of_ranks_nvm,
uint8_t nvm_percent)
@@ -508,7 +508,7 @@ BaseTrafficGen::createNvm(Tick duration,
unsigned int num_seq_pkts, unsigned int buffer_size,
unsigned int nbr_of_banks,
unsigned int nbr_of_banks_util,
Enums::AddrMap addr_mapping,
enums::AddrMap addr_mapping,
unsigned int nbr_of_ranks)
{
return std::shared_ptr<BaseGen>(new NvmGen(*this, requestorId,

8
src/cpu/testers/traffic_gen/base.hh
View File

@@ -276,7 +276,7 @@ class BaseTrafficGen : public ClockedObject
uint8_t read_percent, Addr data_limit,
unsigned int num_seq_pkts, unsigned int page_size,
unsigned int nbr_of_banks, unsigned int nbr_of_banks_util,
Enums::AddrMap addr_mapping,
enums::AddrMap addr_mapping,
unsigned int nbr_of_ranks);
std::shared_ptr<BaseGen> createDramRot(
@@ -286,7 +286,7 @@ class BaseTrafficGen : public ClockedObject
uint8_t read_percent, Addr data_limit,
unsigned int num_seq_pkts, unsigned int page_size,
unsigned int nbr_of_banks, unsigned int nbr_of_banks_util,
Enums::AddrMap addr_mapping,
enums::AddrMap addr_mapping,
unsigned int nbr_of_ranks,
unsigned int max_seq_count_per_rank);
@@ -300,7 +300,7 @@ class BaseTrafficGen : public ClockedObject
unsigned int nbr_of_banks_dram, unsigned int nbr_of_banks_util_dram,
unsigned int num_seq_pkts_nvm, unsigned int buffer_size_nvm,
unsigned int nbr_of_banks_nvm, unsigned int nbr_of_banks_util_nvm,
Enums::AddrMap addr_mapping,
enums::AddrMap addr_mapping,
unsigned int nbr_of_ranks_dram,
unsigned int nbr_of_ranks_nvm,
uint8_t nvm_percent);
@@ -312,7 +312,7 @@ class BaseTrafficGen : public ClockedObject
uint8_t read_percent, Addr data_limit,
unsigned int num_seq_pkts, unsigned int buffer_size,
unsigned int nbr_of_banks, unsigned int nbr_of_banks_util,
Enums::AddrMap addr_mapping,
enums::AddrMap addr_mapping,
unsigned int nbr_of_ranks);
std::shared_ptr<BaseGen> createStrided(

14
src/cpu/testers/traffic_gen/dram_gen.cc
View File

@@ -53,7 +53,7 @@ DramGen::DramGen(SimObject &obj,
unsigned int num_seq_pkts, unsigned int page_size,
unsigned int nbr_of_banks_DRAM,
unsigned int nbr_of_banks_util,
Enums::AddrMap addr_mapping,
enums::AddrMap addr_mapping,
unsigned int nbr_of_ranks)
: RandomGen(obj, requestor_id, _duration, start_addr, end_addr,
_blocksize, cacheline_size, min_period, max_period,
@@ -105,13 +105,13 @@ DramGen::getNextPacket()
} else {
// increment the column by one
if (addrMapping == Enums::RoRaBaCoCh ||
addrMapping == Enums::RoRaBaChCo)
if (addrMapping == enums::RoRaBaCoCh ||
addrMapping == enums::RoRaBaChCo)
// Simply increment addr by blocksize to increment
// the column by one
addr += blocksize;
else if (addrMapping == Enums::RoCoRaBaCh) {
else if (addrMapping == enums::RoCoRaBaCh) {
// Explicity increment the column bits
unsigned int new_col = ((addr / blocksize /
nbrOfBanksDRAM / nbrOfRanks) %
@@ -166,8 +166,8 @@ DramGen::genStartAddr(unsigned int new_bank, unsigned int new_rank)
unsigned int new_col =
random_mt.random<unsigned int>(0, columns_per_page - numSeqPkts);
if (addrMapping == Enums::RoRaBaCoCh ||
addrMapping == Enums::RoRaBaChCo) {
if (addrMapping == enums::RoRaBaCoCh ||
addrMapping == enums::RoRaBaChCo) {
// Block bits, then page bits, then bank bits, then rank bits
replaceBits(addr, blockBits + pageBits + bankBits - 1,
blockBits + pageBits, new_bank);
@@ -176,7 +176,7 @@ DramGen::genStartAddr(unsigned int new_bank, unsigned int new_rank)
replaceBits(addr, blockBits + pageBits + bankBits +rankBits - 1,
blockBits + pageBits + bankBits, new_rank);
}
} else if (addrMapping == Enums::RoCoRaBaCh) {
} else if (addrMapping == enums::RoCoRaBaCh) {
// Block bits, then bank bits, then rank bits, then page bits
replaceBits(addr, blockBits + bankBits - 1, blockBits, new_bank);
replaceBits(addr, blockBits + bankBits + rankBits + pageBits - 1,

4
src/cpu/testers/traffic_gen/dram_gen.hh
View File

@@ -90,7 +90,7 @@ class DramGen : public RandomGen
uint8_t read_percent, Addr data_limit,
unsigned int num_seq_pkts, unsigned int page_size,
unsigned int nbr_of_banks_DRAM, unsigned int nbr_of_banks_util,
Enums::AddrMap addr_mapping,
enums::AddrMap addr_mapping,
unsigned int nbr_of_ranks);
PacketPtr getNextPacket();
@@ -136,7 +136,7 @@ class DramGen : public RandomGen
const unsigned int nbrOfBanksUtil;
/** Address mapping to be used */
Enums::AddrMap addrMapping;
enums::AddrMap addrMapping;
/** Number of rank bits in DRAM address*/
const unsigned int rankBits;

6
src/cpu/testers/traffic_gen/dram_rot_gen.cc
View File

@@ -98,13 +98,13 @@ DramRotGen::getNextPacket()
} else {
// increment the column by one
if (addrMapping == Enums::RoRaBaCoCh ||
addrMapping == Enums::RoRaBaChCo)
if (addrMapping == enums::RoRaBaCoCh ||
addrMapping == enums::RoRaBaChCo)
// Simply increment addr by blocksize to
// increment the column by one
addr += blocksize;
else if (addrMapping == Enums::RoCoRaBaCh) {
else if (addrMapping == enums::RoCoRaBaCh) {
// Explicity increment the column bits
unsigned int new_col = ((addr / blocksize /

2
src/cpu/testers/traffic_gen/dram_rot_gen.hh
View File

@@ -89,7 +89,7 @@ class DramRotGen : public DramGen
uint8_t read_percent, Addr data_limit,
unsigned int num_seq_pkts, unsigned int page_size,
unsigned int nbr_of_banks_DRAM, unsigned int nbr_of_banks_util,
Enums::AddrMap addr_mapping,
enums::AddrMap addr_mapping,
unsigned int nbr_of_ranks,
unsigned int max_seq_count_per_rank)
: DramGen(obj, requestor_id, _duration, start_addr, end_addr,

14
src/cpu/testers/traffic_gen/hybrid_gen.cc
View File

@@ -59,7 +59,7 @@ HybridGen::HybridGen(SimObject &obj,
unsigned int num_seq_pkts_nvm, unsigned int buffer_size_nvm,
unsigned int nbr_of_banks_nvm,
unsigned int nbr_of_banks_util_nvm,
Enums::AddrMap addr_mapping,
enums::AddrMap addr_mapping,
unsigned int nbr_of_ranks_dram,
unsigned int nbr_of_ranks_nvm,
uint8_t nvm_percent)
@@ -197,13 +197,13 @@ HybridGen::getNextPacket()
} else {
// increment the column by one
if (addrMapping == Enums::RoRaBaCoCh ||
addrMapping == Enums::RoRaBaChCo)
if (addrMapping == enums::RoRaBaCoCh ||
addrMapping == enums::RoRaBaChCo)
// Simply increment addr by blocksize to increment
// the column by one
addr += blocksize;
else if (addrMapping == Enums::RoCoRaBaCh) {
else if (addrMapping == enums::RoCoRaBaCh) {
// Explicity increment the column bits
unsigned int new_col = ((addr / blocksize /
nbrOfBanks / nbrOfRanks) %
@@ -258,8 +258,8 @@ HybridGen::genStartAddr(unsigned int new_bank, unsigned int new_rank)
unsigned int new_col =
random_mt.random<unsigned int>(0, burst_per_page - numSeqPkts);
if (addrMapping == Enums::RoRaBaCoCh ||
addrMapping == Enums::RoRaBaChCo) {
if (addrMapping == enums::RoRaBaCoCh ||
addrMapping == enums::RoRaBaChCo) {
// Block bits, then page bits, then bank bits, then rank bits
replaceBits(addr, blockBits + pageBits + bankBits - 1,
blockBits + pageBits, new_bank);
@@ -268,7 +268,7 @@ HybridGen::genStartAddr(unsigned int new_bank, unsigned int new_rank)
replaceBits(addr, blockBits + pageBits + bankBits +rankBits - 1,
blockBits + pageBits + bankBits, new_rank);
}
} else if (addrMapping == Enums::RoCoRaBaCh) {
} else if (addrMapping == enums::RoCoRaBaCh) {
// Block bits, then bank bits, then rank bits, then page bits
replaceBits(addr, blockBits + bankBits - 1, blockBits, new_bank);
replaceBits(addr, blockBits + bankBits + rankBits + pageBits - 1,

4
src/cpu/testers/traffic_gen/hybrid_gen.hh
View File

@@ -106,7 +106,7 @@ class HybridGen : public BaseGen
unsigned int nbr_of_banks_dram, unsigned int nbr_of_banks_util_dram,
unsigned int num_seq_pkts_nvm, unsigned int buffer_size_nvm,
unsigned int nbr_of_banks_nvm, unsigned int nbr_of_banks_util_nvm,
Enums::AddrMap addr_mapping,
enums::AddrMap addr_mapping,
unsigned int nbr_of_ranks_dram,
unsigned int nbr_of_ranks_nvm,
uint8_t nvm_percent);
@@ -204,7 +204,7 @@ class HybridGen : public BaseGen
const unsigned int nbrOfBanksUtilNvm;
/** Address mapping to be used */
Enums::AddrMap addrMapping;
enums::AddrMap addrMapping;
/** Number of ranks to be utilized for a given configuration */
const unsigned int nbrOfRanksDram;

14
src/cpu/testers/traffic_gen/nvm_gen.cc
View File

@@ -53,7 +53,7 @@ NvmGen::NvmGen(SimObject &obj,
unsigned int num_seq_pkts, unsigned int buffer_size,
unsigned int nbr_of_banks,
unsigned int nbr_of_banks_util,
Enums::AddrMap addr_mapping,
enums::AddrMap addr_mapping,
unsigned int nbr_of_ranks)
: RandomGen(obj, requestor_id, _duration, start_addr, end_addr,
_blocksize, cacheline_size, min_period, max_period,
@@ -105,13 +105,13 @@ NvmGen::getNextPacket()
} else {
// increment the column by one
if (addrMapping == Enums::RoRaBaCoCh ||
addrMapping == Enums::RoRaBaChCo)
if (addrMapping == enums::RoRaBaCoCh ||
addrMapping == enums::RoRaBaChCo)
// Simply increment addr by blocksize to increment
// the column by one
addr += blocksize;
else if (addrMapping == Enums::RoCoRaBaCh) {
else if (addrMapping == enums::RoCoRaBaCh) {
// Explicity increment the column bits
unsigned int new_col = ((addr / blocksize /
nbrOfBanksNVM / nbrOfRanks) %
@@ -161,8 +161,8 @@ NvmGen::genStartAddr(unsigned int new_bank, unsigned int new_rank)
unsigned int new_col =
random_mt.random<unsigned int>(0, burst_per_buffer - numSeqPkts);
if (addrMapping == Enums::RoRaBaCoCh ||
addrMapping == Enums::RoRaBaChCo) {
if (addrMapping == enums::RoRaBaCoCh ||
addrMapping == enums::RoRaBaChCo) {
// Block bits, then buffer bits, then bank bits, then rank bits
replaceBits(addr, blockBits + bufferBits + bankBits - 1,
blockBits + bufferBits, new_bank);
@@ -172,7 +172,7 @@ NvmGen::genStartAddr(unsigned int new_bank, unsigned int new_rank)
rankBits - 1, blockBits + bufferBits + bankBits,
new_rank);
}
} else if (addrMapping == Enums::RoCoRaBaCh) {
} else if (addrMapping == enums::RoCoRaBaCh) {
// Block bits, then bank bits, then rank bits, then buffer bits
replaceBits(addr, blockBits + bankBits - 1, blockBits, new_bank);
replaceBits(addr, blockBits + bankBits + rankBits + bufferBits - 1,

4
src/cpu/testers/traffic_gen/nvm_gen.hh
View File

@@ -90,7 +90,7 @@ class NvmGen : public RandomGen
uint8_t read_percent, Addr data_limit,
unsigned int num_seq_pkts, unsigned int buffer_size,
unsigned int nbr_of_banks, unsigned int nbr_of_banks_util,
Enums::AddrMap addr_mapping,
enums::AddrMap addr_mapping,
unsigned int nbr_of_ranks);
PacketPtr getNextPacket();
@@ -136,7 +136,7 @@ class NvmGen : public RandomGen
const unsigned int nbrOfBanksUtil;
/** Address mapping to be used */
Enums::AddrMap addrMapping;
enums::AddrMap addrMapping;
/** Number of rank bits in NVM address*/
const unsigned int rankBits;

4
src/cpu/testers/traffic_gen/traffic_gen.cc
View File

@@ -220,8 +220,8 @@ TrafficGen::parseConfig()
is >> stride_size >> page_size >> nbr_of_banks >>
nbr_of_banks_util >> _addr_mapping >>
nbr_of_ranks;
Enums::AddrMap addr_mapping =
static_cast<Enums::AddrMap>(_addr_mapping);
enums::AddrMap addr_mapping =
static_cast<enums::AddrMap>(_addr_mapping);
if (stride_size > page_size)
warn("Memory generator stride size (%d) is greater"