mem-ruby, gpu-compute: fix formatting of TCC (#536)
mem-ruby, gpu-compute: fix formatting of TCC Fix several not properly indented prints and extraneous extra lines in the SLICC code for the GPU TCC (L2 cache).
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@@ -258,8 +258,7 @@ machine(MachineType:TCC, "TCC Cache")
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// request queue going to NB
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//
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// ** IN_PORTS **
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// ** IN_PORTS **
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in_port(triggerQueue_in, TriggerMsg, triggerQueue) {
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if (triggerQueue_in.isReady(clockEdge())) {
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peek(triggerQueue_in, TriggerMsg) {
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@@ -283,8 +282,7 @@ machine(MachineType:TCC, "TCC Cache")
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}
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}
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// handle responses from directory here
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in_port(responseFromNB_in, ResponseMsg, responseFromNB) {
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if (responseFromNB_in.isReady(clockEdge())) {
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peek(responseFromNB_in, ResponseMsg, block_on="addr") {
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@@ -876,9 +874,9 @@ machine(MachineType:TCC, "TCC Cache")
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p_popRequestQueue;
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}
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// Transition to be called when a read request with SLC flag set arrives at
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// entry in state W. It evicts and invalidates the cache entry before
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// forwarding the request to global memory
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// Transition to be called when a read request with SLC flag set arrives at
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// entry in state W. It evicts and invalidates the cache entry before
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// forwarding the request to global memory
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transition(W, RdBypassEvict, WIB) {TagArrayRead} {
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p_profileMiss;
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t_allocateTBE;
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@@ -888,9 +886,9 @@ machine(MachineType:TCC, "TCC Cache")
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p_popRequestQueue;
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}
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// Transition to be called when a read request with SLC flag set arrives at
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// entry in state M. It evicts and invalidates the cache entry before
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// forwarding the request to global memory to main memory
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// Transition to be called when a read request with SLC flag set arrives at
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// entry in state M. It evicts and invalidates the cache entry before
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// forwarding the request to global memory to main memory
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transition(M, RdBypassEvict, WIB) {TagArrayRead} {
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p_profileMiss;
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t_allocateTBE;
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@@ -900,9 +898,9 @@ machine(MachineType:TCC, "TCC Cache")
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p_popRequestQueue;
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}
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// Transition to be called when a read request with SLC flag set arrives at
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// entry in state V. It invalidates the cache entry before forwarding the
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// request to global memory.
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// Transition to be called when a read request with SLC flag set arrives at
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// entry in state V. It invalidates the cache entry before forwarding the
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// request to global memory.
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transition(V, RdBypassEvict, I) {TagArrayRead} {
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p_profileMiss;
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t_allocateTBE;
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@@ -911,8 +909,8 @@ machine(MachineType:TCC, "TCC Cache")
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p_popRequestQueue;
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}
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// Transition to be called when a read request with SLC flag arrives at entry
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// in transient state. The request stalls until the pending transition is complete.
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// Transition to be called when a read request with SLC flag arrives at entry
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// in transient state. The request stalls until the pending transition is complete.
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transition({WI, WIB, IV}, RdBypassEvict) {
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st_stallAndWaitRequest;
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}
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@@ -955,7 +953,6 @@ machine(MachineType:TCC, "TCC Cache")
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// The following atomic pass on actions will send the request to the directory,
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// and are triggered when an atomic request is received that is not in TCC,
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// and/or if SLC is set.
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transition(V, AtomicPassOn, A) {TagArrayRead} {
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p_profileHit;
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i_invL2;
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@@ -1032,9 +1029,9 @@ machine(MachineType:TCC, "TCC Cache")
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p_popRequestQueue;
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}
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// Transition to be called when a write request with SLC bit set arrives at an
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// entry with state V. The entry has to be evicted and invalidated before the
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// request is forwarded to global memory
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// Transition to be called when a write request with SLC bit set arrives at an
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// entry with state V. The entry has to be evicted and invalidated before the
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// request is forwarded to global memory
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transition(V, WrVicBlkEvict, I) {TagArrayRead, TagArrayWrite, DataArrayWrite} {
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p_profileMiss;
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ut_updateTag;
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@@ -1044,9 +1041,9 @@ machine(MachineType:TCC, "TCC Cache")
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p_popRequestQueue;
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}
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// Transition to be called when a write request with SLC bit set arrives at an
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// entry with state W. The entry has to be evicted and invalidated before the
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// request is forwarded to global memory.
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// Transition to be called when a write request with SLC bit set arrives at an
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// entry with state W. The entry has to be evicted and invalidated before the
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// request is forwarded to global memory.
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transition(W, WrVicBlkEvict, I) {TagArrayRead, TagArrayWrite, DataArrayWrite} {
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p_profileMiss;
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ut_updateTag;
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@@ -1091,9 +1088,9 @@ machine(MachineType:TCC, "TCC Cache")
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pp_popProbeQueue;
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}
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// Transition to be called when the response for a request with SLC bit set
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// arrives. The request has to be forwarded to the core that needs it while
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// making sure no entry is allocated.
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// Transition to be called when the response for a request with SLC bit set
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// arrives. The request has to be forwarded to the core that needs it while
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// making sure no entry is allocated.
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transition(I, Bypass, I) {
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rb_bypassDone;
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pr_popResponseQueue;
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