dev-arm: ambiguous use of getPort()

The recent introduction of getPort() creates a conflict with
the existing method used in arm MMU.

This patch rename the old getPort() in getDMAPort() according
to the returned value (DmaPort class type)

Change-Id: Ief3d83650fd6b08490522341631244be06e380ce
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17469
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
This commit is contained in:
Andrea Mondelli
2019-03-19 13:56:59 -04:00
parent 699ba19096
commit 487ea069be
4 changed files with 6 additions and 6 deletions

View File

@@ -132,9 +132,9 @@ Stage2MMU::Stage2Translation::finish(const Fault &_fault,
}
if (_fault == NoFault && !req->getFlags().isSet(Request::NO_ACCESS)) {
parent.getPort().dmaAction(MemCmd::ReadReq, req->getPaddr(), numBytes,
event, data, tc->getCpuPtr()->clockPeriod(),
req->getFlags());
parent.getDMAPort().dmaAction(
MemCmd::ReadReq, req->getPaddr(), numBytes, event, data,
tc->getCpuPtr()->clockPeriod(), req->getFlags());
} else {
// We can't do the DMA access as there's been a problem, so tell the
// event we're done

View File

@@ -110,7 +110,7 @@ class Stage2MMU : public SimObject
* is used by the two table walkers, and is exposed externally and
* connected through the stage-one table walker.
*/
DmaPort& getPort() { return port; }
DmaPort& getDMAPort() { return port; }
Fault readDataUntimed(ThreadContext *tc, Addr oVAddr, Addr descAddr,
uint8_t *data, int numBytes, Request::Flags flags, bool isFunctional);

View File

@@ -102,7 +102,7 @@ void
TableWalker::setMMU(Stage2MMU *m, MasterID master_id)
{
stage2Mmu = m;
port = &m->getPort();
port = &m->getDMAPort();
masterId = master_id;
}

View File

@@ -1246,7 +1246,7 @@ TLB::translateComplete(const RequestPtr &req, ThreadContext *tc,
Port *
TLB::getTableWalkerPort()
{
return &stage2Mmu->getPort();
return &stage2Mmu->getDMAPort();
}
void