merge
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@@ -45,7 +45,7 @@
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//Sequencer::Sequencer(int core_id, MessageBuffer* mandatory_q)
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#define LLSC_FAIL -2
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long int already = 0;
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Sequencer::Sequencer(const string & name)
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:RubyPort(name)
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{
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@@ -354,9 +354,6 @@ void Sequencer::hitCallback(SequencerRequest* srequest, DataBlock& data) {
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// Returns true if the sequencer already has a load or store outstanding
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int Sequencer::isReady(const RubyRequest& request) {
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// POLINA: check if we are currently flushing the write buffer, if so Ruby is returned as not ready
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// to simulate stalling of the front-end
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// Do we stall all the sequencers? If it is atomic instruction - yes!
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if (m_outstanding_count >= m_max_outstanding_requests) {
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return LIBRUBY_BUFFER_FULL;
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}
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@@ -417,6 +414,8 @@ void Sequencer::issueRequest(const RubyRequest& request) {
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case RubyRequestType_IFETCH:
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if (m_atomic_reads > 0 && m_atomic_writes == 0) {
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m_controller->reset_atomics();
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m_atomic_writes = 0;
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m_atomic_reads = 0;
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}
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else if (m_atomic_writes > 0) {
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assert(m_atomic_reads > m_atomic_writes);
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@@ -428,6 +427,8 @@ void Sequencer::issueRequest(const RubyRequest& request) {
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case RubyRequestType_LD:
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if (m_atomic_reads > 0 && m_atomic_writes == 0) {
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m_controller->reset_atomics();
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m_atomic_writes = 0;
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m_atomic_reads = 0;
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}
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else if (m_atomic_writes > 0) {
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assert(m_atomic_reads > m_atomic_writes);
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@@ -439,6 +440,8 @@ void Sequencer::issueRequest(const RubyRequest& request) {
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case RubyRequestType_ST:
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if (m_atomic_reads > 0 && m_atomic_writes == 0) {
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m_controller->reset_atomics();
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m_atomic_writes = 0;
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m_atomic_reads = 0;
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}
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else if (m_atomic_writes > 0) {
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assert(m_atomic_reads > m_atomic_writes);
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