arch,kern,sim: Move the stats in Kernel::Statistics to Workload.

These are the stats in the base class, not in any derived classes. Only
Alpha has an additional stats. These were not really "kernel"
statistics, they were just applicable primarily in FS. They are
potentially applicable to any simulation, but will probably not be
incremented in SE simulations.

Also this merges these stats from being per thread to being per
workload, ie operating system instance. This is probably more relevant
since exactly what thread within a workload runs which particular
instruction is not very important/predictable, but the aggregate
behavior is. If necessary, this could be adjusted in the future to
split things back out again into stats per thread while keeping them
inside the single workload object.

Change-Id: I130e11a9022bdfcadcfb02c7995871503114cd53
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25147
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Gabe Black
2020-02-06 16:22:30 -08:00
parent 9d51dec937
commit 44f787ae97
7 changed files with 33 additions and 81 deletions

View File

@@ -28,7 +28,6 @@
#include "arch/sparc/interrupts.hh"
#include "arch/sparc/isa.hh"
#include "arch/sparc/kernel_stats.hh"
#include "arch/sparc/registers.hh"
#include "base/bitfield.hh"
#include "base/trace.hh"
@@ -36,7 +35,6 @@
#include "cpu/thread_context.hh"
#include "debug/Quiesce.hh"
#include "debug/Timer.hh"
#include "sim/full_system.hh"
#include "sim/system.hh"
using namespace SparcISA;
@@ -232,8 +230,9 @@ ISA::setFSReg(int miscReg, RegVal val)
DPRINTF(Quiesce, "Cpu executed quiescing instruction\n");
// Time to go to sleep
tc->suspend();
if (FullSystem && tc->getKernelStats())
tc->getKernelStats()->quiesce();
auto *workload = tc->getSystemPtr()->workload;
if (workload)
workload->recordQuiesce();
}
break;

View File

@@ -133,8 +133,9 @@ ThreadContext::quiesce()
DPRINTF(Quiesce, "%s: quiesce()\n", getCpuPtr()->name());
suspend();
if (getKernelStats())
getKernelStats()->quiesce();
auto *workload = getSystemPtr()->workload;
if (workload)
workload->recordQuiesce();
}
@@ -150,8 +151,9 @@ ThreadContext::quiesceTick(Tick resume)
DPRINTF(Quiesce, "%s: quiesceTick until %lu\n", cpu->name(), resume);
suspend();
if (getKernelStats())
getKernelStats()->quiesce();
auto *workload = getSystemPtr()->workload;
if (workload)
workload->recordQuiesce();
}
void

View File

@@ -31,7 +31,6 @@ Import('*')
if env['TARGET_ISA'] == 'null':
Return()
Source('kernel_stats.cc')
Source('linux/events.cc')
Source('linux/linux.cc')
Source('linux/helpers.cc')

View File

@@ -1,57 +0,0 @@
/*
* Copyright (c) 2004-2005 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <string>
#include "base/trace.hh"
#include "cpu/thread_context.hh"
#include "kern/kernel_stats.hh"
#include "sim/system.hh"
using namespace std;
using namespace Stats;
namespace Kernel {
void
Statistics::regStats(const string &_name)
{
myname = _name;
_arm
.name(name() + ".inst.arm")
.desc("number of arm instructions executed")
;
_quiesce
.name(name() + ".inst.quiesce")
.desc("number of quiesce instructions executed")
;
}
} // namespace Kernel

View File

@@ -35,28 +35,20 @@
#include "sim/stats.hh"
// What does kernel stats expect is included?
namespace Kernel {
namespace Kernel
{
class Statistics : public Serializable
{
protected:
std::string myname;
protected:
Stats::Scalar _arm;
Stats::Scalar _quiesce;
public:
virtual ~Statistics() {}
const std::string name() const { return myname; }
virtual void regStats(const std::string &name);
virtual void regStats(const std::string &name) { myname = name; };
public:
void arm() { _arm++; }
void quiesce() { _quiesce++; }
public:
void serialize(CheckpointOut &cp) const override {}
void unserialize(CheckpointIn &cp) override {}
};

View File

@@ -61,7 +61,6 @@
#include "debug/Quiesce.hh"
#include "debug/WorkItems.hh"
#include "dev/net/dist_iface.hh"
#include "kern/kernel_stats.hh"
#include "params/BaseCPU.hh"
#include "sim/full_system.hh"
#include "sim/process.hh"
@@ -116,8 +115,9 @@ arm(ThreadContext *tc)
if (!FullSystem)
panicFsOnlyPseudoInst("arm");
if (tc->getKernelStats())
tc->getKernelStats()->arm();
auto *workload = tc->getSystemPtr()->workload;
if (workload)
workload->recordArm();
}
void

View File

@@ -32,6 +32,7 @@
#include "base/loader/symtab.hh"
#include "params/Workload.hh"
#include "sim/sim_object.hh"
#include "sim/stats.hh"
class System;
class ThreadContext;
@@ -41,8 +42,24 @@ class Workload : public SimObject
protected:
virtual Addr fixFuncEventAddr(Addr addr) const { return addr; }
struct WorkloadStats : public Stats::Group
{
Stats::Scalar arm;
Stats::Scalar quiesce;
WorkloadStats(Workload *workload) : Stats::Group(workload),
arm(this, "inst.arm", "number of arm instructions executed"),
quiesce(this, "inst.quiesce",
"number of quiesce instructions executed")
{}
} stats;
public:
using SimObject::SimObject;
Workload(const WorkloadParams *_params) : SimObject(_params), stats(this)
{}
void recordQuiesce() { stats.quiesce++; }
void recordArm() { stats.arm++; }
System *system = nullptr;