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arch-arm: Fix HVC trapping beahviour

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This patch is fixing HVC trapping behaviour, reusing the pseudocode
implementation provided in the arm arm.

Change-Id: I0bc81478400b99d84534c1c8871f894722f547c5
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/13776
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
This commit is contained in:
Giacomo Travaglini
2018-10-23 13:33:12 +01:00
parent 47a8c479d9
commit 438ecf9cb0
1 changed files with 13 additions and 3 deletions
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16
src/arch/arm/isa/insts/misc64.isa
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@@ -51,10 +51,20 @@ let {{
hvcCode = '''
SCR scr = Scr64;
HCR hcr = Hcr64;
CPSR cpsr = Cpsr;
if (!ArmSystem::haveVirtualization(xc->tcBase()) ||
(ArmSystem::haveSecurity(xc->tcBase()) && (!scr.ns || !scr.hce))) {
fault = disabledFault();
auto tc = xc->tcBase();
ExceptionLevel pstate_EL = (ExceptionLevel)(uint8_t)(cpsr.el);
bool unalloc_encod = !ArmSystem::haveEL(tc, EL2) || pstate_EL == EL0 ||
(pstate_EL == EL1 && inSecureState(tc));
bool hvc_enable = ArmSystem::haveEL(tc, EL3) ?
scr.hce : !hcr.hcd;
if (unalloc_encod || !hvc_enable) {
fault = undefinedFault64(tc, pstate_EL);
} else {
fault = std::make_shared<HypervisorCall>(machInst, bits(machInst, 20, 5));
}