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arch-vega: Implement MI300 FLAT SVE bit

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For scratch instructions only, this bit specifies if an offset in a VGPR
should be used for address calculation. This is new in MI300 and was
previously the LDS bit. The LDS bit is rarely used and in fact gem5 does
not even check this bit.

This fixes a bug when SADDR == 0x7f (i.e., no SGPR should be used) where
a VGPR was being added to the address when it should have been ignored.

Change-Id: I9864379692df6795b25b58b98825da05d18fc5db
This commit is contained in:
Matthew Poremba
2024-06-15 13:48:57 -07:00
parent 1dab4be002
commit 42369eab2c
2 changed files with 14 additions and 3 deletions
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2
src/arch/amdgpu/vega/gpu_decoder.hh
View File

@@ -1714,7 +1714,7 @@ namespace VegaISA
struct InFmt_FLAT {
unsigned int OFFSET : 13;
unsigned int LDS : 1;
unsigned int SVE : 1;
unsigned int SEG : 2;
unsigned int GLC : 1;
unsigned int SLC : 1;

15
src/arch/amdgpu/vega/insts/op_encodings.hh
View File

@@ -1306,6 +1306,11 @@ namespace VegaISA
ConstScalarOperandU32 soffset(gpuDynInst, saddr);
soffset.read();
ConstVecOperandU32 voffset(gpuDynInst, vaddr);
if (instData.SVE) {
voffset.read();
}
Addr flat_scratch_addr = readFlatScratch(gpuDynInst);
int elemSize;
@@ -1320,6 +1325,7 @@ namespace VegaISA
unsigned swizzleOffset = soffset.rawData() + offset;
for (int lane = 0; lane < NumVecElemPerVecReg; ++lane) {
if (gpuDynInst->exec_mask[lane]) {
swizzleOffset += instData.SVE ? voffset[lane] : 0;
gpuDynInst->addr.at(lane) = flat_scratch_addr
+ swizzle(swizzleOffset, lane, elemSize);
}
@@ -1328,7 +1334,9 @@ namespace VegaISA
assert(isFlatScratch());
ConstVecOperandU32 voffset(gpuDynInst, vaddr);
voffset.read();
if (instData.SVE) {
voffset.read();
}
Addr flat_scratch_addr = readFlatScratch(gpuDynInst);
@@ -1343,8 +1351,11 @@ namespace VegaISA
for (int lane = 0; lane < NumVecElemPerVecReg; ++lane) {
if (gpuDynInst->exec_mask[lane]) {
VecElemU32 vgpr_offset =
instData.SVE ? voffset[lane] : 0;
gpuDynInst->addr.at(lane) = flat_scratch_addr
+ swizzle(voffset[lane] + offset, lane, elemSize);
+ swizzle(vgpr_offset + offset, lane, elemSize);
}
}
}