mem-cache: Adopt a more sensible cache class hierarchy
This patch changes what goes into the BaseCache and what goes into the Cache, to make it easier to add a NoncoherentCache with as much re-use as possible. A number of redundant members and definitions are also removed in the process. This is a modified version of a changeset put together by Andreas Hansson <andreas.hansson@arm.com> Change-Id: Ie9dd73c4ec07732e778e7416b712dad8b4bd5d4b Reviewed-on: https://gem5-review.googlesource.com/10431 Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
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src/mem/cache/write_queue_entry.cc
vendored
2
src/mem/cache/write_queue_entry.cc
vendored
@@ -139,7 +139,7 @@ WriteQueueEntry::checkFunctional(PacketPtr pkt)
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}
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bool
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WriteQueueEntry::sendPacket(Cache &cache)
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WriteQueueEntry::sendPacket(BaseCache &cache)
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{
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return cache.sendWriteQueuePacket(this);
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}
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