Add that one IPR memory space address that we keep seeing
--HG-- extra : convert_revision : 81b365ac9ca8b33cae99107e5b1900f7c46f0866
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@@ -90,8 +90,17 @@ AlphaTlb::checkCacheability(MemReqPtr &req)
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if (req->paddr & PA_UNCACHED_BIT) {
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if (PA_IPR_SPACE(req->paddr)) {
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// IPR memory space not implemented
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if (!req->xc->misspeculating())
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panic("IPR memory space not implemented! PA=%x\n", req->paddr);
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if (!req->xc->misspeculating()) {
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switch (req->paddr) {
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case 0xFFFFF00188:
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req->data = 0;
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break;
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default:
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panic("IPR memory space not implemented! PA=%x\n",
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req->paddr);
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}
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}
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} else {
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// mark request as uncacheable
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req->flags |= UNCACHEABLE;
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