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mem-garnet: Reduce complexity of data structures within SwitchAllocator

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The switch allocator implements a two step separable allocator and
utilizes port winner and vc winner data structures for functionality.
This improves the data structures used and their operations to improve
overall performance of the simulation. We start with an invalid output
port(-1) and an invalid vc(-1) and then allocate the outports
and vcs to inport.

Change-Id: I38b70ebdc1a54b8f748c2a5d510814bf139b9eaa
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44285
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Srikant Bharadwaj
2021-04-08 02:45:59 -04:00
parent c4aad44a62
commit 40c69e8f64
2 changed files with 12 additions and 21 deletions
Download Patch File Download Diff File Expand all files Collapse all files

29
src/mem/ruby/network/garnet/SwitchAllocator.cc
View File

@@ -55,22 +55,17 @@ SwitchAllocator::init()
m_num_outports = m_router->get_num_outports();
m_round_robin_inport.resize(m_num_outports);
m_round_robin_invc.resize(m_num_inports);
m_port_requests.resize(m_num_outports);
m_vc_winners.resize(m_num_outports);
m_port_requests.resize(m_num_inports);
m_vc_winners.resize(m_num_inports);
for (int i = 0; i < m_num_inports; i++) {
m_round_robin_invc[i] = 0;
m_port_requests[i] = -1;
m_vc_winners[i] = -1;
}
for (int i = 0; i < m_num_outports; i++) {
m_port_requests[i].resize(m_num_inports);
m_vc_winners[i].resize(m_num_inports);
m_round_robin_inport[i] = 0;
for (int j = 0; j < m_num_inports; j++) {
m_port_requests[i][j] = false; // [outport][inport]
}
}
}
@@ -127,8 +122,8 @@ SwitchAllocator::arbitrate_inports()
if (make_request) {
m_input_arbiter_activity++;
m_port_requests[outport][inport] = true;
m_vc_winners[outport][inport]= invc;
m_port_requests[inport] = outport;
m_vc_winners[inport] = invc;
break; // got one vc winner for this port
}
@@ -168,12 +163,12 @@ SwitchAllocator::arbitrate_outports()
inport_iter++) {
// inport has a request this cycle for outport
if (m_port_requests[outport][inport]) {
if (m_port_requests[inport] == outport) {
auto output_unit = m_router->getOutputUnit(outport);
auto input_unit = m_router->getInputUnit(inport);
// grant this outport to this inport
int invc = m_vc_winners[outport][inport];
int invc = m_vc_winners[inport];
int outvc = input_unit->get_outvc(invc);
if (outvc == -1) {
@@ -236,7 +231,7 @@ SwitchAllocator::arbitrate_outports()
}
// remove this request
m_port_requests[outport][inport] = false;
m_port_requests[inport] = -1;
// Update Round Robin pointer
m_round_robin_inport[outport] = inport + 1;
@@ -382,11 +377,7 @@ SwitchAllocator::get_vnet(int invc)
void
SwitchAllocator::clear_request_vector()
{
for (int i = 0; i < m_num_outports; i++) {
for (int j = 0; j < m_num_inports; j++) {
m_port_requests[i][j] = false;
}
}
std::fill(m_port_requests.begin(), m_port_requests.end(), -1);
}
void

4
src/mem/ruby/network/garnet/SwitchAllocator.hh
View File

@@ -79,8 +79,8 @@ class SwitchAllocator : public Consumer
Router *m_router;
std::vector<int> m_round_robin_invc;
std::vector<int> m_round_robin_inport;
std::vector<std::vector<bool>> m_port_requests;
std::vector<std::vector<int>> m_vc_winners; // a list for each outport
std::vector<int> m_port_requests;
std::vector<int> m_vc_winners;
};
#endif // __MEM_RUBY_NETWORK_GARNET_0_SWITCHALLOCATOR_HH__