arch-gcn3: ensure that atomics follow HSA conventions

Add asserts to make sure atomics are following the HSA conventions
that atomics should be word aligned (i.e., can't be byte aligned)
and should not be misaligned such that a given lane's access
spans multiple cache lines.

Change-Id: Ia48758b9ed96764864234dc607f337e30e287d1c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/29941
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>

src/arch/gcn3/gpu_mem_helpers.hh

@@ -80,6 +80,12 @@ initMemReqHelper(GPUDynInstPtr gpuDynInst, MemCmd mem_req_type,
             misaligned_acc = split_addr > vaddr;
 
             if (is_atomic) {
+                // make sure request is word aligned
+                assert((vaddr & 0x3) == 0);
+
+                // a given lane's atomic can't cross cache lines
+                assert(!misaligned_acc);
+
                 req = std::make_shared<Request>(vaddr, sizeof(T), 0,
                     gpuDynInst->computeUnit()->masterId(), 0,
                     gpuDynInst->wfDynId,