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dev-arm: Make CNTFRQ a GenericTimer parameter

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This register should be in theory initialized by the highest
priviledged software. We do this in gem5 to avoid KVM
complications (the gem5 firmware won't run at highest EL)

JIRA: https://gem5.atlassian.net/browse/GEM5-611

Change-Id: I62d368105af48584f2fe9671de7c70b484b40c12
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/29612
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: Bobby R. Bruce <bbruce@ucdavis.edu>
This commit is contained in:
Giacomo Travaglini
2020-05-26 10:45:36 +01:00
committed by Bobby R. Bruce
parent e2abf6c157
commit 3dd3c1e893
3 changed files with 49 additions and 35 deletions
Download Patch File Download Diff File Expand all files Collapse all files

9
src/dev/arm/GenericTimer.py
View File

@@ -89,6 +89,15 @@ Reference:
int_virt = Param.ArmPPI("Virtual timer interrupt")
int_hyp = Param.ArmPPI("Hypervisor timer interrupt")
# This value should be in theory initialized by the highest
# priviledged software. We do this in gem5 to avoid KVM
# complications (the gem5 firmware won't run at highest EL)
#
# PLEASE note: change this parameter only if using the gem5 bootloader
# Another real world bootloader might be changing the CNTFRQ register
# value, so this initial value will be discarded
cntfrq = Param.UInt64(0x1800000, "Value for the CNTFRQ timer register")
def generateDeviceTree(self, state):
node = FdtNode("timer")

36
src/dev/arm/generic_timer.cc
View File

@@ -689,6 +689,42 @@ GenericTimer::readMiscReg(int reg, unsigned cpu)
}
}
GenericTimer::CoreTimers::CoreTimers(GenericTimer &_parent,
ArmSystem &system, unsigned cpu,
ArmInterruptPin *_irqPhysS, ArmInterruptPin *_irqPhysNS,
ArmInterruptPin *_irqVirt, ArmInterruptPin *_irqHyp)
: parent(_parent),
cntfrq(parent.params()->cntfrq),
threadContext(system.getThreadContext(cpu)),
irqPhysS(_irqPhysS),
irqPhysNS(_irqPhysNS),
irqVirt(_irqVirt),
irqHyp(_irqHyp),
physS(csprintf("%s.phys_s_timer%d", parent.name(), cpu),
system, parent, parent.systemCounter,
_irqPhysS),
// This should really be phys_timerN, but we are stuck with
// arch_timer for backwards compatibility.
physNS(csprintf("%s.arch_timer%d", parent.name(), cpu),
system, parent, parent.systemCounter,
_irqPhysNS),
virt(csprintf("%s.virt_timer%d", parent.name(), cpu),
system, parent, parent.systemCounter,
_irqVirt),
hyp(csprintf("%s.hyp_timer%d", parent.name(), cpu),
system, parent, parent.systemCounter,
_irqHyp),
physEvStream{
EventFunctionWrapper([this]{ physEventStreamCallback(); },
csprintf("%s.phys_event_gen%d", parent.name(), cpu)), 0, 0
},
virtEvStream{
EventFunctionWrapper([this]{ virtEventStreamCallback(); },
csprintf("%s.virt_event_gen%d", parent.name(), cpu)), 0, 0
}
{
}
void
GenericTimer::CoreTimers::physEventStreamCallback()
{

39
src/dev/arm/generic_timer.hh
View File

@@ -293,38 +293,10 @@ class GenericTimer : public SimObject
public:
CoreTimers(GenericTimer &_parent, ArmSystem &system, unsigned cpu,
ArmInterruptPin *_irqPhysS, ArmInterruptPin *_irqPhysNS,
ArmInterruptPin *_irqVirt, ArmInterruptPin *_irqHyp)
: parent(_parent),
threadContext(system.getThreadContext(cpu)),
irqPhysS(_irqPhysS),
irqPhysNS(_irqPhysNS),
irqVirt(_irqVirt),
irqHyp(_irqHyp),
physS(csprintf("%s.phys_s_timer%d", parent.name(), cpu),
system, parent, parent.systemCounter,
_irqPhysS),
// This should really be phys_timerN, but we are stuck with
// arch_timer for backwards compatibility.
physNS(csprintf("%s.arch_timer%d", parent.name(), cpu),
system, parent, parent.systemCounter,
_irqPhysNS),
virt(csprintf("%s.virt_timer%d", parent.name(), cpu),
system, parent, parent.systemCounter,
_irqVirt),
hyp(csprintf("%s.hyp_timer%d", parent.name(), cpu),
system, parent, parent.systemCounter,
_irqHyp),
physEvStream{
EventFunctionWrapper([this]{ physEventStreamCallback(); },
csprintf("%s.phys_event_gen%d", parent.name(), cpu)), 0, 0
},
virtEvStream{
EventFunctionWrapper([this]{ virtEventStreamCallback(); },
csprintf("%s.virt_event_gen%d", parent.name(), cpu)), 0, 0
}
{
cntfrq = 0x01800000;
}
ArmInterruptPin *_irqVirt, ArmInterruptPin *_irqHyp);
/// Generic Timer parent reference
GenericTimer &parent;
/// System counter frequency as visible from this core
uint32_t cntfrq;
@@ -335,9 +307,6 @@ class GenericTimer : public SimObject
/// Hypervisor control register
CNTHCTL cnthctl;
/// Generic Timer parent reference
GenericTimer &parent;
/// Thread (HW) context associated to this PE implementation
ThreadContext *threadContext;