dev,stats: Update stats style of src/dev/net
Change-Id: I06c41a0506415c7a4f2608668b90d328c2789e61 Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/36435 Reviewed-by: Gabe Black <gabe.black@gmail.com> Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu> Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
@@ -30,339 +30,245 @@
|
||||
|
||||
#include "sim/stats.hh"
|
||||
|
||||
void
|
||||
EtherDevice::regStats()
|
||||
EtherDevice::EtherDeviceStats::EtherDeviceStats(Stats::Group *parent)
|
||||
: Stats::Group(parent, "EtherDevice"),
|
||||
ADD_STAT(postedInterrupts, "Number of posts to CPU"),
|
||||
ADD_STAT(txBytes, "Bytes Transmitted"),
|
||||
ADD_STAT(rxBytes, "Bytes Received"),
|
||||
ADD_STAT(txPackets, "Number of Packets Transmitted"),
|
||||
ADD_STAT(rxPackets, "Number of Packets Received"),
|
||||
ADD_STAT(txIpChecksums, "Number of tx IP Checksums done by device"),
|
||||
ADD_STAT(rxIpChecksums, "Number of rx IP Checksums done by device"),
|
||||
ADD_STAT(txTcpChecksums, "Number of tx TCP Checksums done by device"),
|
||||
ADD_STAT(rxTcpChecksums, "Number of rx TCP Checksums done by device"),
|
||||
ADD_STAT(txUdpChecksums, "Number of tx UDP Checksums done by device"),
|
||||
ADD_STAT(rxUdpChecksums, "Number of rx UDP Checksums done by device"),
|
||||
ADD_STAT(descDmaReads, "Number of descriptors the device read w/ DMA"),
|
||||
ADD_STAT(descDmaWrites, "Number of descriptors the device wrote w/ DMA"),
|
||||
ADD_STAT(descDmaRdBytes, "Number of descriptor bytes read w/ DMA"),
|
||||
ADD_STAT(descDmaWrBytes, "Number of descriptor bytes write w/ DMA"),
|
||||
ADD_STAT(totBandwidth, "Total Bandwidth (bits/s)",
|
||||
txBandwidth + rxBandwidth),
|
||||
ADD_STAT(totPackets, "Total Packets", txPackets + rxPackets),
|
||||
ADD_STAT(totBytes, "Total Bytes", txBytes + rxBytes),
|
||||
ADD_STAT(totPacketRate, "Total Tranmission Rate (packets/s)",
|
||||
totPackets / simSeconds),
|
||||
ADD_STAT(txBandwidth, "Transmit Bandwidth (bits/s)",
|
||||
txBytes * Stats::constant(8) / simSeconds),
|
||||
ADD_STAT(rxBandwidth, "Receive Bandwidth (bits/s)",
|
||||
rxBytes * Stats::constant(8) / simSeconds),
|
||||
ADD_STAT(txPacketRate, "Packet Tranmission Rate (packets/s)",
|
||||
txPackets / simSeconds),
|
||||
ADD_STAT(rxPacketRate, "Packet Reception Rate (packets/s)",
|
||||
rxPackets / simSeconds),
|
||||
ADD_STAT(postedSwi, "Number of software interrupts posted to CPU"),
|
||||
ADD_STAT(totalSwi, "Total number of Swi written to ISR"),
|
||||
ADD_STAT(coalescedSwi,
|
||||
"Average number of Swi's coalesced into each post",
|
||||
totalSwi / postedInterrupts),
|
||||
ADD_STAT(postedRxIdle,"Number of rxIdle interrupts posted to CPU"),
|
||||
ADD_STAT(totalRxIdle, "Total number of RxIdle written to ISR"),
|
||||
ADD_STAT(coalescedRxIdle,
|
||||
"Average number of RxIdle's coalesced into each post",
|
||||
totalRxIdle / postedInterrupts),
|
||||
ADD_STAT(postedRxOk, "Number of RxOk interrupts posted to CPU"),
|
||||
ADD_STAT(totalRxOk, "Total number of RxOk written to ISR"),
|
||||
ADD_STAT(coalescedRxOk,
|
||||
"Average number of RxOk's coalesced into each post",
|
||||
totalRxOk / postedInterrupts),
|
||||
ADD_STAT(postedRxDesc, "Number of RxDesc interrupts posted to CPU"),
|
||||
ADD_STAT(totalRxDesc, "Total number of RxDesc written to ISR"),
|
||||
ADD_STAT(coalescedRxDesc,
|
||||
"Average number of RxDesc's coalesced into each post",
|
||||
totalRxDesc / postedInterrupts),
|
||||
ADD_STAT(postedTxOk, "Number of TxOk interrupts posted to CPU"),
|
||||
ADD_STAT(totalTxOk, "Total number of TxOk written to ISR"),
|
||||
ADD_STAT(coalescedTxOk,
|
||||
"Average number of TxOk's coalesced into each post",
|
||||
totalTxOk / postedInterrupts),
|
||||
ADD_STAT(postedTxIdle, "Number of TxIdle interrupts posted to CPU"),
|
||||
ADD_STAT(totalTxIdle, "Total number of TxIdle written to ISR"),
|
||||
ADD_STAT(coalescedTxIdle,
|
||||
"Average number of TxIdle's coalesced into each post",
|
||||
totalTxIdle / postedInterrupts),
|
||||
ADD_STAT(postedTxDesc, "Number of TxDesc interrupts posted to CPU"),
|
||||
ADD_STAT(totalTxDesc, "Total number of TxDesc written to ISR"),
|
||||
ADD_STAT(coalescedTxDesc,
|
||||
"Average number of TxDesc's coalesced into each post",
|
||||
totalTxDesc / postedInterrupts),
|
||||
ADD_STAT(postedRxOrn, "Number of RxOrn posted to CPU"),
|
||||
ADD_STAT(totalRxOrn, "Total number of RxOrn written to ISR"),
|
||||
ADD_STAT(coalescedRxOrn,
|
||||
"Average number of RxOrn's coalesced into each post",
|
||||
totalRxOrn / postedInterrupts),
|
||||
ADD_STAT(coalescedTotal,
|
||||
"Average number of interrupts coalesced into each post"),
|
||||
ADD_STAT(droppedPackets, "Number of packets dropped")
|
||||
{
|
||||
PciDevice::regStats();
|
||||
|
||||
postedInterrupts
|
||||
.precision(0);
|
||||
|
||||
txBytes
|
||||
.name(name() + ".txBytes")
|
||||
.desc("Bytes Transmitted")
|
||||
.prereq(txBytes)
|
||||
;
|
||||
.prereq(txBytes);
|
||||
|
||||
rxBytes
|
||||
.name(name() + ".rxBytes")
|
||||
.desc("Bytes Received")
|
||||
.prereq(rxBytes)
|
||||
;
|
||||
.prereq(rxBytes);
|
||||
|
||||
txPackets
|
||||
.name(name() + ".txPackets")
|
||||
.desc("Number of Packets Transmitted")
|
||||
.prereq(txBytes)
|
||||
;
|
||||
.prereq(txBytes);
|
||||
|
||||
rxPackets
|
||||
.name(name() + ".rxPackets")
|
||||
.desc("Number of Packets Received")
|
||||
.prereq(rxBytes)
|
||||
;
|
||||
.prereq(rxBytes);
|
||||
|
||||
txIpChecksums
|
||||
.name(name() + ".txIpChecksums")
|
||||
.desc("Number of tx IP Checksums done by device")
|
||||
.precision(0)
|
||||
.prereq(txBytes)
|
||||
;
|
||||
.prereq(txBytes);
|
||||
|
||||
rxIpChecksums
|
||||
.name(name() + ".rxIpChecksums")
|
||||
.desc("Number of rx IP Checksums done by device")
|
||||
.precision(0)
|
||||
.prereq(rxBytes)
|
||||
;
|
||||
.prereq(rxBytes);
|
||||
|
||||
txTcpChecksums
|
||||
.name(name() + ".txTcpChecksums")
|
||||
.desc("Number of tx TCP Checksums done by device")
|
||||
.precision(0)
|
||||
.prereq(txBytes)
|
||||
;
|
||||
.prereq(txBytes);
|
||||
|
||||
rxTcpChecksums
|
||||
.name(name() + ".rxTcpChecksums")
|
||||
.desc("Number of rx TCP Checksums done by device")
|
||||
.precision(0)
|
||||
.prereq(rxBytes)
|
||||
;
|
||||
.prereq(rxBytes);
|
||||
|
||||
txUdpChecksums
|
||||
.name(name() + ".txUdpChecksums")
|
||||
.desc("Number of tx UDP Checksums done by device")
|
||||
.precision(0)
|
||||
.prereq(txBytes)
|
||||
;
|
||||
.prereq(txBytes);
|
||||
|
||||
rxUdpChecksums
|
||||
.name(name() + ".rxUdpChecksums")
|
||||
.desc("Number of rx UDP Checksums done by device")
|
||||
.precision(0)
|
||||
.prereq(rxBytes)
|
||||
;
|
||||
.prereq(rxBytes);
|
||||
|
||||
descDmaReads
|
||||
.name(name() + ".descDMAReads")
|
||||
.desc("Number of descriptors the device read w/ DMA")
|
||||
.precision(0)
|
||||
;
|
||||
.precision(0);
|
||||
|
||||
descDmaWrites
|
||||
.name(name() + ".descDMAWrites")
|
||||
.desc("Number of descriptors the device wrote w/ DMA")
|
||||
.precision(0)
|
||||
;
|
||||
.precision(0);
|
||||
|
||||
descDmaRdBytes
|
||||
.name(name() + ".descDmaReadBytes")
|
||||
.desc("number of descriptor bytes read w/ DMA")
|
||||
.precision(0)
|
||||
;
|
||||
.precision(0);
|
||||
|
||||
descDmaWrBytes
|
||||
.name(name() + ".descDmaWriteBytes")
|
||||
.desc("number of descriptor bytes write w/ DMA")
|
||||
.precision(0)
|
||||
;
|
||||
.precision(0);
|
||||
|
||||
txBandwidth
|
||||
.name(name() + ".txBandwidth")
|
||||
.desc("Transmit Bandwidth (bits/s)")
|
||||
.precision(0)
|
||||
.prereq(txBytes)
|
||||
;
|
||||
|
||||
rxBandwidth
|
||||
.name(name() + ".rxBandwidth")
|
||||
.desc("Receive Bandwidth (bits/s)")
|
||||
.precision(0)
|
||||
.prereq(rxBytes)
|
||||
;
|
||||
.prereq(rxBytes);
|
||||
|
||||
totBandwidth
|
||||
.name(name() + ".totBandwidth")
|
||||
.desc("Total Bandwidth (bits/s)")
|
||||
.precision(0)
|
||||
.prereq(totBytes)
|
||||
;
|
||||
.prereq(totBytes);
|
||||
|
||||
totPackets
|
||||
.name(name() + ".totPackets")
|
||||
.desc("Total Packets")
|
||||
.precision(0)
|
||||
.prereq(totBytes)
|
||||
;
|
||||
.prereq(totBytes);
|
||||
|
||||
totBytes
|
||||
.name(name() + ".totBytes")
|
||||
.desc("Total Bytes")
|
||||
.precision(0)
|
||||
.prereq(totBytes)
|
||||
;
|
||||
.prereq(totBytes);
|
||||
|
||||
totPacketRate
|
||||
.name(name() + ".totPPS")
|
||||
.desc("Total Tranmission Rate (packets/s)")
|
||||
.precision(0)
|
||||
.prereq(totBytes)
|
||||
;
|
||||
.prereq(totBytes);
|
||||
|
||||
txPacketRate
|
||||
.name(name() + ".txPPS")
|
||||
.desc("Packet Tranmission Rate (packets/s)")
|
||||
.precision(0)
|
||||
.prereq(txBytes)
|
||||
;
|
||||
.prereq(txBytes);
|
||||
|
||||
rxPacketRate
|
||||
.name(name() + ".rxPPS")
|
||||
.desc("Packet Reception Rate (packets/s)")
|
||||
.precision(0)
|
||||
.prereq(rxBytes)
|
||||
;
|
||||
.prereq(rxBytes);
|
||||
|
||||
postedSwi
|
||||
.name(name() + ".postedSwi")
|
||||
.desc("number of software interrupts posted to CPU")
|
||||
.precision(0)
|
||||
;
|
||||
.precision(0);
|
||||
|
||||
totalSwi
|
||||
.name(name() + ".totalSwi")
|
||||
.desc("total number of Swi written to ISR")
|
||||
.precision(0)
|
||||
;
|
||||
.precision(0);
|
||||
|
||||
coalescedSwi
|
||||
.name(name() + ".coalescedSwi")
|
||||
.desc("average number of Swi's coalesced into each post")
|
||||
.precision(0)
|
||||
;
|
||||
.precision(0);
|
||||
|
||||
postedRxIdle
|
||||
.name(name() + ".postedRxIdle")
|
||||
.desc("number of rxIdle interrupts posted to CPU")
|
||||
.precision(0)
|
||||
;
|
||||
.precision(0);
|
||||
|
||||
totalRxIdle
|
||||
.name(name() + ".totalRxIdle")
|
||||
.desc("total number of RxIdle written to ISR")
|
||||
.precision(0)
|
||||
;
|
||||
.precision(0);
|
||||
|
||||
coalescedRxIdle
|
||||
.name(name() + ".coalescedRxIdle")
|
||||
.desc("average number of RxIdle's coalesced into each post")
|
||||
.precision(0)
|
||||
;
|
||||
.precision(0);
|
||||
|
||||
postedRxOk
|
||||
.name(name() + ".postedRxOk")
|
||||
.desc("number of RxOk interrupts posted to CPU")
|
||||
.precision(0)
|
||||
;
|
||||
.precision(0);
|
||||
|
||||
totalRxOk
|
||||
.name(name() + ".totalRxOk")
|
||||
.desc("total number of RxOk written to ISR")
|
||||
.precision(0)
|
||||
;
|
||||
.precision(0);
|
||||
|
||||
coalescedRxOk
|
||||
.name(name() + ".coalescedRxOk")
|
||||
.desc("average number of RxOk's coalesced into each post")
|
||||
.precision(0)
|
||||
;
|
||||
.precision(0);
|
||||
|
||||
postedRxDesc
|
||||
.name(name() + ".postedRxDesc")
|
||||
.desc("number of RxDesc interrupts posted to CPU")
|
||||
.precision(0)
|
||||
;
|
||||
.precision(0);
|
||||
|
||||
totalRxDesc
|
||||
.name(name() + ".totalRxDesc")
|
||||
.desc("total number of RxDesc written to ISR")
|
||||
.precision(0)
|
||||
;
|
||||
.precision(0);
|
||||
|
||||
coalescedRxDesc
|
||||
.name(name() + ".coalescedRxDesc")
|
||||
.desc("average number of RxDesc's coalesced into each post")
|
||||
.precision(0)
|
||||
;
|
||||
.precision(0);
|
||||
|
||||
postedTxOk
|
||||
.name(name() + ".postedTxOk")
|
||||
.desc("number of TxOk interrupts posted to CPU")
|
||||
.precision(0)
|
||||
;
|
||||
.precision(0);
|
||||
|
||||
totalTxOk
|
||||
.name(name() + ".totalTxOk")
|
||||
.desc("total number of TxOk written to ISR")
|
||||
.precision(0)
|
||||
;
|
||||
.precision(0);
|
||||
|
||||
coalescedTxOk
|
||||
.name(name() + ".coalescedTxOk")
|
||||
.desc("average number of TxOk's coalesced into each post")
|
||||
.precision(0)
|
||||
;
|
||||
.precision(0);
|
||||
|
||||
postedTxIdle
|
||||
.name(name() + ".postedTxIdle")
|
||||
.desc("number of TxIdle interrupts posted to CPU")
|
||||
.precision(0)
|
||||
;
|
||||
.precision(0);
|
||||
|
||||
totalTxIdle
|
||||
.name(name() + ".totalTxIdle")
|
||||
.desc("total number of TxIdle written to ISR")
|
||||
.precision(0)
|
||||
;
|
||||
.precision(0);
|
||||
|
||||
coalescedTxIdle
|
||||
.name(name() + ".coalescedTxIdle")
|
||||
.desc("average number of TxIdle's coalesced into each post")
|
||||
.precision(0)
|
||||
;
|
||||
.precision(0);
|
||||
|
||||
postedTxDesc
|
||||
.name(name() + ".postedTxDesc")
|
||||
.desc("number of TxDesc interrupts posted to CPU")
|
||||
.precision(0)
|
||||
;
|
||||
.precision(0);
|
||||
|
||||
totalTxDesc
|
||||
.name(name() + ".totalTxDesc")
|
||||
.desc("total number of TxDesc written to ISR")
|
||||
.precision(0)
|
||||
;
|
||||
.precision(0);
|
||||
|
||||
coalescedTxDesc
|
||||
.name(name() + ".coalescedTxDesc")
|
||||
.desc("average number of TxDesc's coalesced into each post")
|
||||
.precision(0)
|
||||
;
|
||||
.precision(0);
|
||||
|
||||
postedRxOrn
|
||||
.name(name() + ".postedRxOrn")
|
||||
.desc("number of RxOrn posted to CPU")
|
||||
.precision(0)
|
||||
;
|
||||
.precision(0);
|
||||
|
||||
totalRxOrn
|
||||
.name(name() + ".totalRxOrn")
|
||||
.desc("total number of RxOrn written to ISR")
|
||||
.precision(0)
|
||||
;
|
||||
.precision(0);
|
||||
|
||||
coalescedRxOrn
|
||||
.name(name() + ".coalescedRxOrn")
|
||||
.desc("average number of RxOrn's coalesced into each post")
|
||||
.precision(0)
|
||||
;
|
||||
.precision(0);
|
||||
|
||||
coalescedTotal
|
||||
.name(name() + ".coalescedTotal")
|
||||
.desc("average number of interrupts coalesced into each post")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
postedInterrupts
|
||||
.name(name() + ".postedInterrupts")
|
||||
.desc("number of posts to CPU")
|
||||
.precision(0)
|
||||
;
|
||||
.precision(0);
|
||||
|
||||
droppedPackets
|
||||
.name(name() + ".droppedPackets")
|
||||
.desc("number of packets dropped")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
coalescedSwi = totalSwi / postedInterrupts;
|
||||
coalescedRxIdle = totalRxIdle / postedInterrupts;
|
||||
coalescedRxOk = totalRxOk / postedInterrupts;
|
||||
coalescedRxDesc = totalRxDesc / postedInterrupts;
|
||||
coalescedTxOk = totalTxOk / postedInterrupts;
|
||||
coalescedTxIdle = totalTxIdle / postedInterrupts;
|
||||
coalescedTxDesc = totalTxDesc / postedInterrupts;
|
||||
coalescedRxOrn = totalRxOrn / postedInterrupts;
|
||||
.precision(0);
|
||||
|
||||
coalescedTotal = (totalSwi + totalRxIdle + totalRxOk + totalRxDesc +
|
||||
totalTxOk + totalTxIdle + totalTxDesc +
|
||||
totalRxOrn) / postedInterrupts;
|
||||
|
||||
txBandwidth = txBytes * Stats::constant(8) / simSeconds;
|
||||
rxBandwidth = rxBytes * Stats::constant(8) / simSeconds;
|
||||
totBandwidth = txBandwidth + rxBandwidth;
|
||||
totBytes = txBytes + rxBytes;
|
||||
totPackets = txPackets + rxPackets;
|
||||
|
||||
txPacketRate = txPackets / simSeconds;
|
||||
rxPacketRate = rxPackets / simSeconds;
|
||||
totPacketRate = totPackets / simSeconds;
|
||||
}
|
||||
|
||||
@@ -47,7 +47,8 @@ class EtherDevice : public PciDevice
|
||||
public:
|
||||
typedef EtherDeviceParams Params;
|
||||
EtherDevice(const Params ¶ms)
|
||||
: PciDevice(params)
|
||||
: PciDevice(params),
|
||||
etherDeviceStats(this)
|
||||
{}
|
||||
|
||||
const Params &
|
||||
@@ -56,59 +57,80 @@ class EtherDevice : public PciDevice
|
||||
return dynamic_cast<const Params &>(_params);
|
||||
}
|
||||
|
||||
public:
|
||||
void regStats();
|
||||
|
||||
protected:
|
||||
Stats::Scalar txBytes;
|
||||
Stats::Scalar rxBytes;
|
||||
Stats::Scalar txPackets;
|
||||
Stats::Scalar rxPackets;
|
||||
Stats::Scalar txIpChecksums;
|
||||
Stats::Scalar rxIpChecksums;
|
||||
Stats::Scalar txTcpChecksums;
|
||||
Stats::Scalar rxTcpChecksums;
|
||||
Stats::Scalar txUdpChecksums;
|
||||
Stats::Scalar rxUdpChecksums;
|
||||
Stats::Scalar descDmaReads;
|
||||
Stats::Scalar descDmaWrites;
|
||||
Stats::Scalar descDmaRdBytes;
|
||||
Stats::Scalar descDmaWrBytes;
|
||||
Stats::Formula totBandwidth;
|
||||
Stats::Formula totPackets;
|
||||
Stats::Formula totBytes;
|
||||
Stats::Formula totPacketRate;
|
||||
Stats::Formula txBandwidth;
|
||||
Stats::Formula rxBandwidth;
|
||||
Stats::Formula txPacketRate;
|
||||
Stats::Formula rxPacketRate;
|
||||
Stats::Scalar postedSwi;
|
||||
Stats::Formula coalescedSwi;
|
||||
Stats::Scalar totalSwi;
|
||||
Stats::Scalar postedRxIdle;
|
||||
Stats::Formula coalescedRxIdle;
|
||||
Stats::Scalar totalRxIdle;
|
||||
Stats::Scalar postedRxOk;
|
||||
Stats::Formula coalescedRxOk;
|
||||
Stats::Scalar totalRxOk;
|
||||
Stats::Scalar postedRxDesc;
|
||||
Stats::Formula coalescedRxDesc;
|
||||
Stats::Scalar totalRxDesc;
|
||||
Stats::Scalar postedTxOk;
|
||||
Stats::Formula coalescedTxOk;
|
||||
Stats::Scalar totalTxOk;
|
||||
Stats::Scalar postedTxIdle;
|
||||
Stats::Formula coalescedTxIdle;
|
||||
Stats::Scalar totalTxIdle;
|
||||
Stats::Scalar postedTxDesc;
|
||||
Stats::Formula coalescedTxDesc;
|
||||
Stats::Scalar totalTxDesc;
|
||||
Stats::Scalar postedRxOrn;
|
||||
Stats::Formula coalescedRxOrn;
|
||||
Stats::Scalar totalRxOrn;
|
||||
Stats::Formula coalescedTotal;
|
||||
Stats::Scalar postedInterrupts;
|
||||
Stats::Scalar droppedPackets;
|
||||
struct EtherDeviceStats : public Stats::Group
|
||||
{
|
||||
EtherDeviceStats(Stats::Group *parent);
|
||||
|
||||
Stats::Scalar postedInterrupts;
|
||||
|
||||
Stats::Scalar txBytes;
|
||||
Stats::Scalar rxBytes;
|
||||
|
||||
Stats::Scalar txPackets;
|
||||
Stats::Scalar rxPackets;
|
||||
|
||||
Stats::Scalar txIpChecksums;
|
||||
Stats::Scalar rxIpChecksums;
|
||||
|
||||
Stats::Scalar txTcpChecksums;
|
||||
Stats::Scalar rxTcpChecksums;
|
||||
|
||||
Stats::Scalar txUdpChecksums;
|
||||
Stats::Scalar rxUdpChecksums;
|
||||
|
||||
Stats::Scalar descDmaReads;
|
||||
Stats::Scalar descDmaWrites;
|
||||
|
||||
Stats::Scalar descDmaRdBytes;
|
||||
Stats::Scalar descDmaWrBytes;
|
||||
|
||||
Stats::Formula totBandwidth;
|
||||
Stats::Formula totPackets;
|
||||
Stats::Formula totBytes;
|
||||
Stats::Formula totPacketRate;
|
||||
|
||||
Stats::Formula txBandwidth;
|
||||
Stats::Formula rxBandwidth;
|
||||
|
||||
Stats::Formula txPacketRate;
|
||||
Stats::Formula rxPacketRate;
|
||||
|
||||
Stats::Scalar postedSwi;
|
||||
Stats::Scalar totalSwi;
|
||||
Stats::Formula coalescedSwi;
|
||||
|
||||
Stats::Scalar postedRxIdle;
|
||||
Stats::Scalar totalRxIdle;
|
||||
Stats::Formula coalescedRxIdle;
|
||||
|
||||
Stats::Scalar postedRxOk;
|
||||
Stats::Scalar totalRxOk;
|
||||
Stats::Formula coalescedRxOk;
|
||||
|
||||
Stats::Scalar postedRxDesc;
|
||||
Stats::Scalar totalRxDesc;
|
||||
Stats::Formula coalescedRxDesc;
|
||||
|
||||
Stats::Scalar postedTxOk;
|
||||
Stats::Scalar totalTxOk;
|
||||
Stats::Formula coalescedTxOk;
|
||||
|
||||
Stats::Scalar postedTxIdle;
|
||||
Stats::Scalar totalTxIdle;
|
||||
Stats::Formula coalescedTxIdle;
|
||||
|
||||
Stats::Scalar postedTxDesc;
|
||||
Stats::Scalar totalTxDesc;
|
||||
Stats::Formula coalescedTxDesc;
|
||||
|
||||
Stats::Scalar postedRxOrn;
|
||||
Stats::Scalar totalRxOrn;
|
||||
Stats::Formula coalescedRxOrn;
|
||||
|
||||
Stats::Formula coalescedTotal;
|
||||
Stats::Scalar droppedPackets;
|
||||
} etherDeviceStats;
|
||||
};
|
||||
|
||||
/**
|
||||
|
||||
@@ -732,7 +732,7 @@ void
|
||||
IGbE::cpuPostInt()
|
||||
{
|
||||
|
||||
postedInterrupts++;
|
||||
etherDeviceStats.postedInterrupts++;
|
||||
|
||||
if (!(regs.icr() & regs.imr)) {
|
||||
DPRINTF(Ethernet, "Interrupt Masked. Not Posting\n");
|
||||
@@ -1330,7 +1330,7 @@ IGbE::RxDescCache::pktComplete()
|
||||
DPRINTF(EthernetDesc, "Checking IP checksum\n");
|
||||
status |= RXDS_IPCS;
|
||||
csum = htole(cksum(ip));
|
||||
igbe->rxIpChecksums++;
|
||||
igbe->etherDeviceStats.rxIpChecksums++;
|
||||
if (cksum(ip) != 0) {
|
||||
err |= RXDE_IPE;
|
||||
ext_err |= RXDEE_IPE;
|
||||
@@ -1343,7 +1343,7 @@ IGbE::RxDescCache::pktComplete()
|
||||
status |= RXDS_TCPCS;
|
||||
ptype |= RXDP_TCP;
|
||||
csum = htole(cksum(tcp));
|
||||
igbe->rxTcpChecksums++;
|
||||
igbe->etherDeviceStats.rxTcpChecksums++;
|
||||
if (cksum(tcp) != 0) {
|
||||
DPRINTF(EthernetDesc, "Checksum is bad!!\n");
|
||||
err |= RXDE_TCPE;
|
||||
@@ -1357,7 +1357,7 @@ IGbE::RxDescCache::pktComplete()
|
||||
status |= RXDS_UDPCS;
|
||||
ptype |= RXDP_UDP;
|
||||
csum = htole(cksum(udp));
|
||||
igbe->rxUdpChecksums++;
|
||||
igbe->etherDeviceStats.rxUdpChecksums++;
|
||||
if (cksum(udp) != 0) {
|
||||
DPRINTF(EthernetDesc, "Checksum is bad!!\n");
|
||||
ext_err |= RXDEE_TCPE;
|
||||
@@ -1820,7 +1820,7 @@ IGbE::TxDescCache::pktComplete()
|
||||
if (ip && TxdOp::ixsm(desc)) {
|
||||
ip->sum(0);
|
||||
ip->sum(cksum(ip));
|
||||
igbe->txIpChecksums++;
|
||||
igbe->etherDeviceStats.txIpChecksums++;
|
||||
DPRINTF(EthernetDesc, "Calculated IP checksum\n");
|
||||
}
|
||||
if (TxdOp::txsm(desc)) {
|
||||
@@ -1829,13 +1829,13 @@ IGbE::TxDescCache::pktComplete()
|
||||
if (tcp) {
|
||||
tcp->sum(0);
|
||||
tcp->sum(cksum(tcp));
|
||||
igbe->txTcpChecksums++;
|
||||
igbe->etherDeviceStats.txTcpChecksums++;
|
||||
DPRINTF(EthernetDesc, "Calculated TCP checksum\n");
|
||||
} else if (udp) {
|
||||
assert(udp);
|
||||
udp->sum(0);
|
||||
udp->sum(cksum(udp));
|
||||
igbe->txUdpChecksums++;
|
||||
igbe->etherDeviceStats.txUdpChecksums++;
|
||||
DPRINTF(EthernetDesc, "Calculated UDP checksum\n");
|
||||
} else {
|
||||
panic("Told to checksum, but don't know how\n");
|
||||
@@ -2153,8 +2153,8 @@ IGbE::txStateMachine()
|
||||
bool
|
||||
IGbE::ethRxPkt(EthPacketPtr pkt)
|
||||
{
|
||||
rxBytes += pkt->length;
|
||||
rxPackets++;
|
||||
etherDeviceStats.rxBytes += pkt->length;
|
||||
etherDeviceStats.rxPackets++;
|
||||
|
||||
DPRINTF(Ethernet, "RxFIFO: Receiving pcakte from wire\n");
|
||||
|
||||
@@ -2307,8 +2307,8 @@ IGbE::txWire()
|
||||
"TxFIFO: Successful transmit, bytes available in fifo: %d\n",
|
||||
txFifo.avail());
|
||||
|
||||
txBytes += txFifo.front()->length;
|
||||
txPackets++;
|
||||
etherDeviceStats.txBytes += txFifo.front()->length;
|
||||
etherDeviceStats.txPackets++;
|
||||
|
||||
txFifo.pop();
|
||||
}
|
||||
|
||||
@@ -740,28 +740,28 @@ NSGigE::devIntrPost(uint32_t interrupts)
|
||||
|
||||
if (interrupts & regs.imr) {
|
||||
if (interrupts & ISR_SWI) {
|
||||
totalSwi++;
|
||||
etherDeviceStats.totalSwi++;
|
||||
}
|
||||
if (interrupts & ISR_RXIDLE) {
|
||||
totalRxIdle++;
|
||||
etherDeviceStats.totalRxIdle++;
|
||||
}
|
||||
if (interrupts & ISR_RXOK) {
|
||||
totalRxOk++;
|
||||
etherDeviceStats.totalRxOk++;
|
||||
}
|
||||
if (interrupts & ISR_RXDESC) {
|
||||
totalRxDesc++;
|
||||
etherDeviceStats.totalRxDesc++;
|
||||
}
|
||||
if (interrupts & ISR_TXOK) {
|
||||
totalTxOk++;
|
||||
etherDeviceStats.totalTxOk++;
|
||||
}
|
||||
if (interrupts & ISR_TXIDLE) {
|
||||
totalTxIdle++;
|
||||
etherDeviceStats.totalTxIdle++;
|
||||
}
|
||||
if (interrupts & ISR_TXDESC) {
|
||||
totalTxDesc++;
|
||||
etherDeviceStats.totalTxDesc++;
|
||||
}
|
||||
if (interrupts & ISR_RXORN) {
|
||||
totalRxOrn++;
|
||||
etherDeviceStats.totalRxOrn++;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -773,7 +773,7 @@ NSGigE::devIntrPost(uint32_t interrupts)
|
||||
Tick when = curTick();
|
||||
if ((regs.isr & regs.imr & ISR_NODELAY) == 0)
|
||||
when += intrDelay;
|
||||
postedInterrupts++;
|
||||
etherDeviceStats.postedInterrupts++;
|
||||
cpuIntrPost(when);
|
||||
}
|
||||
}
|
||||
@@ -790,28 +790,28 @@ NSGigE::devIntrClear(uint32_t interrupts)
|
||||
panic("Cannot clear a reserved interrupt");
|
||||
|
||||
if (regs.isr & regs.imr & ISR_SWI) {
|
||||
postedSwi++;
|
||||
etherDeviceStats.postedSwi++;
|
||||
}
|
||||
if (regs.isr & regs.imr & ISR_RXIDLE) {
|
||||
postedRxIdle++;
|
||||
etherDeviceStats.postedRxIdle++;
|
||||
}
|
||||
if (regs.isr & regs.imr & ISR_RXOK) {
|
||||
postedRxOk++;
|
||||
etherDeviceStats.postedRxOk++;
|
||||
}
|
||||
if (regs.isr & regs.imr & ISR_RXDESC) {
|
||||
postedRxDesc++;
|
||||
etherDeviceStats.postedRxDesc++;
|
||||
}
|
||||
if (regs.isr & regs.imr & ISR_TXOK) {
|
||||
postedTxOk++;
|
||||
etherDeviceStats.postedTxOk++;
|
||||
}
|
||||
if (regs.isr & regs.imr & ISR_TXIDLE) {
|
||||
postedTxIdle++;
|
||||
etherDeviceStats.postedTxIdle++;
|
||||
}
|
||||
if (regs.isr & regs.imr & ISR_TXDESC) {
|
||||
postedTxDesc++;
|
||||
etherDeviceStats.postedTxDesc++;
|
||||
}
|
||||
if (regs.isr & regs.imr & ISR_RXORN) {
|
||||
postedRxOrn++;
|
||||
etherDeviceStats.postedRxOrn++;
|
||||
}
|
||||
|
||||
interrupts &= ~ISR_NOIMPL;
|
||||
@@ -1096,8 +1096,8 @@ NSGigE::rxKick()
|
||||
rxDmaLen = is64bit ? sizeof(rxDesc64.link) : sizeof(rxDesc32.link);
|
||||
rxDmaFree = dmaDescFree;
|
||||
|
||||
descDmaReads++;
|
||||
descDmaRdBytes += rxDmaLen;
|
||||
etherDeviceStats.descDmaReads++;
|
||||
etherDeviceStats.descDmaRdBytes += rxDmaLen;
|
||||
|
||||
if (doRxDmaRead())
|
||||
goto exit;
|
||||
@@ -1109,8 +1109,8 @@ NSGigE::rxKick()
|
||||
rxDmaLen = is64bit ? sizeof(rxDesc64) : sizeof(rxDesc32);
|
||||
rxDmaFree = dmaDescFree;
|
||||
|
||||
descDmaReads++;
|
||||
descDmaRdBytes += rxDmaLen;
|
||||
etherDeviceStats.descDmaReads++;
|
||||
etherDeviceStats.descDmaRdBytes += rxDmaLen;
|
||||
|
||||
if (doRxDmaRead())
|
||||
goto exit;
|
||||
@@ -1216,7 +1216,7 @@ NSGigE::rxKick()
|
||||
IpPtr ip(rxPacket);
|
||||
if (extstsEnable && ip) {
|
||||
extsts |= EXTSTS_IPPKT;
|
||||
rxIpChecksums++;
|
||||
etherDeviceStats.rxIpChecksums++;
|
||||
if (cksum(ip) != 0) {
|
||||
DPRINTF(EthernetCksum, "Rx IP Checksum Error\n");
|
||||
extsts |= EXTSTS_IPERR;
|
||||
@@ -1225,7 +1225,7 @@ NSGigE::rxKick()
|
||||
UdpPtr udp(ip);
|
||||
if (tcp) {
|
||||
extsts |= EXTSTS_TCPPKT;
|
||||
rxTcpChecksums++;
|
||||
etherDeviceStats.rxTcpChecksums++;
|
||||
if (cksum(tcp) != 0) {
|
||||
DPRINTF(EthernetCksum, "Rx TCP Checksum Error\n");
|
||||
extsts |= EXTSTS_TCPERR;
|
||||
@@ -1233,7 +1233,7 @@ NSGigE::rxKick()
|
||||
}
|
||||
} else if (udp) {
|
||||
extsts |= EXTSTS_UDPPKT;
|
||||
rxUdpChecksums++;
|
||||
etherDeviceStats.rxUdpChecksums++;
|
||||
if (cksum(udp) != 0) {
|
||||
DPRINTF(EthernetCksum, "Rx UDP Checksum Error\n");
|
||||
extsts |= EXTSTS_UDPERR;
|
||||
@@ -1267,8 +1267,8 @@ NSGigE::rxKick()
|
||||
}
|
||||
rxDmaFree = dmaDescFree;
|
||||
|
||||
descDmaWrites++;
|
||||
descDmaWrBytes += rxDmaLen;
|
||||
etherDeviceStats.descDmaWrites++;
|
||||
etherDeviceStats.descDmaWrBytes += rxDmaLen;
|
||||
|
||||
if (doRxDmaWrite())
|
||||
goto exit;
|
||||
@@ -1376,8 +1376,8 @@ NSGigE::transmit()
|
||||
#endif
|
||||
|
||||
DDUMP(EthernetData, txFifo.front()->data, txFifo.front()->length);
|
||||
txBytes += txFifo.front()->length;
|
||||
txPackets++;
|
||||
etherDeviceStats.txBytes += txFifo.front()->length;
|
||||
etherDeviceStats.txPackets++;
|
||||
|
||||
DPRINTF(Ethernet, "Successful Xmit! now txFifoAvail is %d\n",
|
||||
txFifo.avail());
|
||||
@@ -1513,8 +1513,8 @@ NSGigE::txKick()
|
||||
txDmaLen = is64bit ? sizeof(txDesc64.link) : sizeof(txDesc32.link);
|
||||
txDmaFree = dmaDescFree;
|
||||
|
||||
descDmaReads++;
|
||||
descDmaRdBytes += txDmaLen;
|
||||
etherDeviceStats.descDmaReads++;
|
||||
etherDeviceStats.descDmaRdBytes += txDmaLen;
|
||||
|
||||
if (doTxDmaRead())
|
||||
goto exit;
|
||||
@@ -1527,8 +1527,8 @@ NSGigE::txKick()
|
||||
txDmaLen = is64bit ? sizeof(txDesc64) : sizeof(txDesc32);
|
||||
txDmaFree = dmaDescFree;
|
||||
|
||||
descDmaReads++;
|
||||
descDmaRdBytes += txDmaLen;
|
||||
etherDeviceStats.descDmaReads++;
|
||||
etherDeviceStats.descDmaRdBytes += txDmaLen;
|
||||
|
||||
if (doTxDmaRead())
|
||||
goto exit;
|
||||
@@ -1602,7 +1602,7 @@ NSGigE::txKick()
|
||||
if (udp) {
|
||||
udp->sum(0);
|
||||
udp->sum(cksum(udp));
|
||||
txUdpChecksums++;
|
||||
etherDeviceStats.txUdpChecksums++;
|
||||
} else {
|
||||
Debug::breakpoint();
|
||||
warn_once("UDPPKT set, but not UDP!\n");
|
||||
@@ -1612,7 +1612,7 @@ NSGigE::txKick()
|
||||
if (tcp) {
|
||||
tcp->sum(0);
|
||||
tcp->sum(cksum(tcp));
|
||||
txTcpChecksums++;
|
||||
etherDeviceStats.txTcpChecksums++;
|
||||
} else {
|
||||
warn_once("TCPPKT set, but not UDP!\n");
|
||||
}
|
||||
@@ -1621,7 +1621,7 @@ NSGigE::txKick()
|
||||
if (ip) {
|
||||
ip->sum(0);
|
||||
ip->sum(cksum(ip));
|
||||
txIpChecksums++;
|
||||
etherDeviceStats.txIpChecksums++;
|
||||
} else {
|
||||
warn_once("IPPKT set, but not UDP!\n");
|
||||
}
|
||||
@@ -1674,8 +1674,8 @@ NSGigE::txKick()
|
||||
sizeof(txDesc32.cmdsts) + sizeof(txDesc32.extsts);
|
||||
}
|
||||
|
||||
descDmaWrites++;
|
||||
descDmaWrBytes += txDmaLen;
|
||||
etherDeviceStats.descDmaWrites++;
|
||||
etherDeviceStats.descDmaWrBytes += txDmaLen;
|
||||
|
||||
transmit();
|
||||
txPacket = 0;
|
||||
@@ -1948,8 +1948,8 @@ NSGigE::rxFilter(const EthPacketPtr &packet)
|
||||
bool
|
||||
NSGigE::recvPacket(EthPacketPtr packet)
|
||||
{
|
||||
rxBytes += packet->length;
|
||||
rxPackets++;
|
||||
etherDeviceStats.rxBytes += packet->length;
|
||||
etherDeviceStats.rxPackets++;
|
||||
|
||||
DPRINTF(Ethernet, "Receiving packet from wire, rxFifoAvail=%d\n",
|
||||
rxFifo.avail());
|
||||
@@ -1983,7 +1983,7 @@ NSGigE::recvPacket(EthPacketPtr packet)
|
||||
}
|
||||
}
|
||||
#endif
|
||||
droppedPackets++;
|
||||
etherDeviceStats.droppedPackets++;
|
||||
devIntrPost(ISR_RXORN);
|
||||
return false;
|
||||
}
|
||||
|
||||
@@ -87,7 +87,8 @@ Device::Device(const Params &p)
|
||||
rxDmaEvent([this]{ rxDmaDone(); }, name()),
|
||||
txDmaEvent([this]{ txDmaDone(); }, name()),
|
||||
dmaReadDelay(p.dma_read_delay), dmaReadFactor(p.dma_read_factor),
|
||||
dmaWriteDelay(p.dma_write_delay), dmaWriteFactor(p.dma_write_factor)
|
||||
dmaWriteDelay(p.dma_write_delay), dmaWriteFactor(p.dma_write_factor),
|
||||
sinicDeviceStats(this)
|
||||
{
|
||||
interface = new Interface(name() + ".int0", this);
|
||||
reset();
|
||||
@@ -96,33 +97,15 @@ Device::Device(const Params &p)
|
||||
Device::~Device()
|
||||
{}
|
||||
|
||||
void
|
||||
Device::regStats()
|
||||
Device::DeviceStats::DeviceStats(Stats::Group *parent)
|
||||
: Stats::Group(parent, "SinicDevice"),
|
||||
ADD_STAT(totalVnicDistance, "Total vnic distance"),
|
||||
ADD_STAT(numVnicDistance, "Number of vnic distance measurements"),
|
||||
ADD_STAT(maxVnicDistance, "Maximum vnic distance"),
|
||||
ADD_STAT(avgVnicDistance, "Average vnic distance",
|
||||
totalVnicDistance / numVnicDistance),
|
||||
_maxVnicDistance(0)
|
||||
{
|
||||
Base::regStats();
|
||||
|
||||
_maxVnicDistance = 0;
|
||||
|
||||
maxVnicDistance
|
||||
.name(name() + ".maxVnicDistance")
|
||||
.desc("maximum vnic distance")
|
||||
;
|
||||
|
||||
totalVnicDistance
|
||||
.name(name() + ".totalVnicDistance")
|
||||
.desc("total vnic distance")
|
||||
;
|
||||
numVnicDistance
|
||||
.name(name() + ".numVnicDistance")
|
||||
.desc("number of vnic distance measurements")
|
||||
;
|
||||
|
||||
avgVnicDistance
|
||||
.name(name() + ".avgVnicDistance")
|
||||
.desc("average vnic distance")
|
||||
;
|
||||
|
||||
avgVnicDistance = totalVnicDistance / numVnicDistance;
|
||||
}
|
||||
|
||||
void
|
||||
@@ -130,7 +113,7 @@ Device::resetStats()
|
||||
{
|
||||
Base::resetStats();
|
||||
|
||||
_maxVnicDistance = 0;
|
||||
sinicDeviceStats._maxVnicDistance = 0;
|
||||
}
|
||||
|
||||
Port &
|
||||
@@ -774,11 +757,11 @@ Device::rxKick()
|
||||
rxState = rxBeginCopy;
|
||||
|
||||
int vnic_distance = rxFifo.countPacketsBefore(vnic->rxIndex);
|
||||
totalVnicDistance += vnic_distance;
|
||||
numVnicDistance += 1;
|
||||
if (vnic_distance > _maxVnicDistance) {
|
||||
maxVnicDistance = vnic_distance;
|
||||
_maxVnicDistance = vnic_distance;
|
||||
sinicDeviceStats.totalVnicDistance += vnic_distance;
|
||||
sinicDeviceStats.numVnicDistance += 1;
|
||||
if (vnic_distance > sinicDeviceStats._maxVnicDistance) {
|
||||
sinicDeviceStats.maxVnicDistance = vnic_distance;
|
||||
sinicDeviceStats._maxVnicDistance = vnic_distance;
|
||||
}
|
||||
|
||||
break;
|
||||
@@ -816,7 +799,7 @@ Device::rxKick()
|
||||
if (ip) {
|
||||
DPRINTF(Ethernet, "ID is %d\n", ip->id());
|
||||
vnic->rxDoneData |= Regs::RxDone_IpPacket;
|
||||
rxIpChecksums++;
|
||||
etherDeviceStats.rxIpChecksums++;
|
||||
if (cksum(ip) != 0) {
|
||||
DPRINTF(EthernetCksum, "Rx IP Checksum Error\n");
|
||||
vnic->rxDoneData |= Regs::RxDone_IpError;
|
||||
@@ -829,14 +812,14 @@ Device::rxKick()
|
||||
tcp->sport(), tcp->dport(), tcp->seq(),
|
||||
tcp->ack());
|
||||
vnic->rxDoneData |= Regs::RxDone_TcpPacket;
|
||||
rxTcpChecksums++;
|
||||
etherDeviceStats.rxTcpChecksums++;
|
||||
if (cksum(tcp) != 0) {
|
||||
DPRINTF(EthernetCksum, "Rx TCP Checksum Error\n");
|
||||
vnic->rxDoneData |= Regs::RxDone_TcpError;
|
||||
}
|
||||
} else if (udp) {
|
||||
vnic->rxDoneData |= Regs::RxDone_UdpPacket;
|
||||
rxUdpChecksums++;
|
||||
etherDeviceStats.rxUdpChecksums++;
|
||||
if (cksum(udp) != 0) {
|
||||
DPRINTF(EthernetCksum, "Rx UDP Checksum Error\n");
|
||||
vnic->rxDoneData |= Regs::RxDone_UdpError;
|
||||
@@ -996,8 +979,8 @@ Device::transmit()
|
||||
#endif
|
||||
|
||||
DDUMP(EthernetData, packet->data, packet->length);
|
||||
txBytes += packet->length;
|
||||
txPackets++;
|
||||
etherDeviceStats.txBytes += packet->length;
|
||||
etherDeviceStats.txPackets++;
|
||||
|
||||
DPRINTF(Ethernet, "Packet Transmit: successful txFifo Available %d\n",
|
||||
txFifo.avail());
|
||||
@@ -1081,19 +1064,19 @@ Device::txKick()
|
||||
if (tcp) {
|
||||
tcp->sum(0);
|
||||
tcp->sum(cksum(tcp));
|
||||
txTcpChecksums++;
|
||||
etherDeviceStats.txTcpChecksums++;
|
||||
}
|
||||
|
||||
UdpPtr udp(ip);
|
||||
if (udp) {
|
||||
udp->sum(0);
|
||||
udp->sum(cksum(udp));
|
||||
txUdpChecksums++;
|
||||
etherDeviceStats.txUdpChecksums++;
|
||||
}
|
||||
|
||||
ip->sum(0);
|
||||
ip->sum(cksum(ip));
|
||||
txIpChecksums++;
|
||||
etherDeviceStats.txIpChecksums++;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1153,8 +1136,8 @@ Device::rxFilter(const EthPacketPtr &packet)
|
||||
bool
|
||||
Device::recvPacket(EthPacketPtr packet)
|
||||
{
|
||||
rxBytes += packet->length;
|
||||
rxPackets++;
|
||||
etherDeviceStats.rxBytes += packet->length;
|
||||
etherDeviceStats.rxPackets++;
|
||||
|
||||
DPRINTF(Ethernet, "Receiving packet from wire, rxFifo Available is %d\n",
|
||||
rxFifo.avail());
|
||||
|
||||
@@ -271,15 +271,20 @@ class Device : public Base
|
||||
* Statistics
|
||||
*/
|
||||
private:
|
||||
Stats::Scalar totalVnicDistance;
|
||||
Stats::Scalar numVnicDistance;
|
||||
Stats::Scalar maxVnicDistance;
|
||||
Stats::Formula avgVnicDistance;
|
||||
struct DeviceStats : public Stats::Group
|
||||
{
|
||||
DeviceStats(Stats::Group *parent);
|
||||
|
||||
Stats::Scalar totalVnicDistance;
|
||||
Stats::Scalar numVnicDistance;
|
||||
Stats::Scalar maxVnicDistance;
|
||||
Stats::Formula avgVnicDistance;
|
||||
|
||||
int _maxVnicDistance;
|
||||
} sinicDeviceStats;
|
||||
|
||||
int _maxVnicDistance;
|
||||
|
||||
public:
|
||||
void regStats() override;
|
||||
void resetStats() override;
|
||||
|
||||
/**
|
||||
|
||||
Reference in New Issue
Block a user