X86: Implement the fld, fst, and fstp instructions.

--HG--
extra : convert_revision : 7dd274bdc3c34839c17d9012a745d7c95dfcfdd8

src/arch/x86/isa/decoder/x87.isa

@@ -242,14 +242,14 @@
     0x5: decode MODRM_REG {
         0x0: decode MODRM_MOD {
             0x3: ffree();
-            default: fld();
+            default: Inst::FLD(Mq);
         }
         0x1: decode MODRM_MOD {
             0x3: Inst::UD2();
             default: fisttp();
         }
-        0x2: fst();
-        0x3: fstp();
+        0x2: Inst::FST(Mq);
+        0x3: Inst::FSTP(Mq);
         0x4: decode MODRM_MOD {
             0x3: fucom();
             default: frstor();

src/arch/x86/isa/insts/x87/data_transfer_and_conversion/load_or_store_floating_point.py

@@ -54,7 +54,36 @@
 # Authors: Gabe Black
 
 microcode = '''
-# FLD
-# FST
-# FSTP
+def macroop FLD_M {
+    ldfp ufp1, seg, sib, disp
+    movfp st(1), ufp1, spm=-1
+};
+
+def macroop FLD_P {
+    rdip t7
+    ldfp ufp1, seg, riprel, disp
+    movfp st(1), ufp1, spm=-1
+};
+
+def macroop FST_M {
+    movfp st(0), ufp1
+    stfp ufp1, seg, sib, disp
+};
+
+def macroop FST_P {
+    movfp st(0), ufp1
+    rdip t7
+    stfp ufp1, seg, riprel, disp
+};
+
+def macroop FSTP_M {
+    movfp st(0), ufp1, spm=1
+    stfp ufp1, seg, sib, disp
+};
+
+def macroop FSTP_P {
+    movfp st(0), ufp1, spm=1
+    rdip t7
+    stfp ufp1, seg, riprel, disp
+};
 '''