ARM: Squash the low order bits of the PC when performing a regular branch.

src/arch/arm/insts/static_inst.hh

@@ -221,7 +221,13 @@ class ArmStaticInst : public StaticInst
     static void
     setNextPC(XC *xc, Addr val)
     {
-        xc->setNextPC((xc->readNextPC() & PcModeMask) |
+        Addr npc = xc->readNextPC();
+        if (npc & (ULL(1) << PcTBitShift)) {
+            val &= ~mask(1);
+        } else {
+            val &= ~mask(2);
+        }
+        xc->setNextPC((npc & PcModeMask) |
                       (val & ~PcModeMask));
     }
 

src/arch/arm/isa/operands.isa

@@ -70,10 +70,11 @@ let {{
     '''
     maybeAIWPCWrite = '''
         if (%(reg_idx)s == PCReg) {
-            if (xc->readPC() & (ULL(1) << PcTBitShift)) {
-                setIWNextPC(xc, %(final_val)s);
-            } else {
+            bool thumb = THUMB;
+            if (thumb) {
                 setNextPC(xc, %(final_val)s);
+            } else {
+                setIWNextPC(xc, %(final_val)s);
             }
         } else {
             xc->%(func)s(this, %(op_idx)s, %(final_val)s);