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arch-gcn3: ds_read_u8 and ds_read_u16 fix

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This changeset zero extends the destination register
for ds_read_u8 and ds_read_u16 instructions.

Change-Id: I193adadd68adf2572b59743b1504f18ad225f506
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/29951
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
This commit is contained in:
Alexandru Dutu
2018-08-03 13:54:04 -04:00
committed by Anthony Gutierrez
parent 13079629a1
commit 3aa633cc3f
1 changed files with 4 additions and 4 deletions
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8
src/arch/gcn3/insts/instructions.cc
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@@ -32016,11 +32016,11 @@ namespace Gcn3ISA
void
Inst_DS__DS_READ_U8::completeAcc(GPUDynInstPtr gpuDynInst)
{
VecOperandU8 vdst(gpuDynInst, extData.VDST);
VecOperandU32 vdst(gpuDynInst, extData.VDST);
for (int lane = 0; lane < NumVecElemPerVecReg; ++lane) {
if (gpuDynInst->exec_mask[lane]) {
vdst[lane] = (reinterpret_cast<VecElemU8*>(
vdst[lane] = (VecElemU32)(reinterpret_cast<VecElemU8*>(
gpuDynInst->d_data))[lane];
}
}
@@ -32096,11 +32096,11 @@ namespace Gcn3ISA
void
Inst_DS__DS_READ_U16::completeAcc(GPUDynInstPtr gpuDynInst)
{
VecOperandU16 vdst(gpuDynInst, extData.VDST);
VecOperandU32 vdst(gpuDynInst, extData.VDST);
for (int lane = 0; lane < NumVecElemPerVecReg; ++lane) {
if (gpuDynInst->exec_mask[lane]) {
vdst[lane] = (reinterpret_cast<VecElemU16*>(
vdst[lane] = (VecElemU32)(reinterpret_cast<VecElemU16*>(
gpuDynInst->d_data))[lane];
}
}