cpu, sim: Return PortProxy &s from all the proxy accessors.

This is a step towards merging the accessors for SE and FS modes.

Change-Id: I76818ab88b97097ac363e243be9cc1911b283090
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18579
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
This commit is contained in:
Gabe Black
2019-05-02 01:33:31 -07:00
parent f349b0845c
commit 39896bd265
8 changed files with 19 additions and 20 deletions

View File

@@ -47,6 +47,9 @@ namespace Kernel {
class Checkpoint;
class FSTranslatingPortProxy;
class SETranslatingPortProxy;
/**
* Struct for holding general thread state that is needed across CPU
* models. This includes things such as pointers to the process,
@@ -100,7 +103,7 @@ struct ThreadState : public Serializable {
PortProxy &getPhysProxy();
FSTranslatingPortProxy &getVirtProxy();
PortProxy &getVirtProxy();
Process *getProcessPtr() { return process; }
@@ -119,7 +122,7 @@ struct ThreadState : public Serializable {
}
}
SETranslatingPortProxy &getMemProxy();
PortProxy &getMemProxy();
/** Reads the number of instructions functionally executed and
* committed.