cpu, sim: Return PortProxy &s from all the proxy accessors.
This is a step towards merging the accessors for SE and FS modes. Change-Id: I76818ab88b97097ac363e243be9cc1911b283090 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18579 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
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@@ -146,7 +146,7 @@ class CheckerThreadContext : public ThreadContext
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PortProxy &getPhysProxy() override { return actualTC->getPhysProxy(); }
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FSTranslatingPortProxy &
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PortProxy &
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getVirtProxy() override
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{
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return actualTC->getVirtProxy();
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@@ -164,7 +164,7 @@ class CheckerThreadContext : public ThreadContext
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actualTC->connectMemPorts(tc);
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}
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SETranslatingPortProxy &
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PortProxy &
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getMemProxy() override
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{
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return actualTC->getMemProxy();
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@@ -132,7 +132,7 @@ class O3ThreadContext : public ThreadContext
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PortProxy &getPhysProxy() override { return thread->getPhysProxy(); }
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FSTranslatingPortProxy &getVirtProxy() override;
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PortProxy &getVirtProxy() override;
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void
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initMemProxies(ThreadContext *tc) override
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@@ -140,7 +140,7 @@ class O3ThreadContext : public ThreadContext
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thread->initMemProxies(tc);
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}
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SETranslatingPortProxy &
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PortProxy &
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getMemProxy() override
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{
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return thread->getMemProxy();
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@@ -54,7 +54,7 @@
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#include "debug/O3CPU.hh"
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template <class Impl>
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FSTranslatingPortProxy&
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PortProxy&
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O3ThreadContext<Impl>::getVirtProxy()
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{
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return thread->getVirtProxy();
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@@ -216,18 +216,14 @@ class SimpleThread : public ThreadState, public ThreadContext
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}
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PortProxy &getPhysProxy() override { return ThreadState::getPhysProxy(); }
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FSTranslatingPortProxy &
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getVirtProxy() override
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{
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return ThreadState::getVirtProxy();
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}
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PortProxy &getVirtProxy() override { return ThreadState::getVirtProxy(); }
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void initMemProxies(ThreadContext *tc) override
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{
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ThreadState::initMemProxies(tc);
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}
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SETranslatingPortProxy &
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PortProxy &
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getMemProxy() override
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{
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return ThreadState::getMemProxy();
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@@ -65,8 +65,6 @@ class BaseTLB;
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class CheckerCPU;
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class Checkpoint;
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class EndQuiesceEvent;
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class SETranslatingPortProxy;
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class FSTranslatingPortProxy;
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class PortProxy;
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class Process;
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class System;
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@@ -152,7 +150,7 @@ class ThreadContext
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virtual PortProxy &getPhysProxy() = 0;
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virtual FSTranslatingPortProxy &getVirtProxy() = 0;
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virtual PortProxy &getVirtProxy() = 0;
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/**
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* Initialise the physical and virtual port proxies and tie them to
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@@ -162,7 +160,7 @@ class ThreadContext
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*/
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virtual void initMemProxies(ThreadContext *tc) = 0;
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virtual SETranslatingPortProxy &getMemProxy() = 0;
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virtual PortProxy &getMemProxy() = 0;
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virtual Process *getProcessPtr() = 0;
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@@ -133,7 +133,7 @@ ThreadState::getPhysProxy()
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return *physProxy;
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}
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FSTranslatingPortProxy &
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PortProxy &
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ThreadState::getVirtProxy()
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{
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assert(FullSystem);
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@@ -141,7 +141,7 @@ ThreadState::getVirtProxy()
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return *virtProxy;
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}
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SETranslatingPortProxy &
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PortProxy &
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ThreadState::getMemProxy()
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{
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assert(!FullSystem);
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@@ -47,6 +47,9 @@ namespace Kernel {
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class Checkpoint;
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class FSTranslatingPortProxy;
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class SETranslatingPortProxy;
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/**
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* Struct for holding general thread state that is needed across CPU
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* models. This includes things such as pointers to the process,
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@@ -100,7 +103,7 @@ struct ThreadState : public Serializable {
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PortProxy &getPhysProxy();
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FSTranslatingPortProxy &getVirtProxy();
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PortProxy &getVirtProxy();
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Process *getProcessPtr() { return process; }
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@@ -119,7 +122,7 @@ struct ThreadState : public Serializable {
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}
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}
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SETranslatingPortProxy &getMemProxy();
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PortProxy &getMemProxy();
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/** Reads the number of instructions functionally executed and
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* committed.
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@@ -161,7 +161,9 @@ Process::clone(ThreadContext *otc, ThreadContext *ntc,
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*/
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delete np->pTable;
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np->pTable = pTable;
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ntc->getMemProxy().setPageTable(np->pTable);
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auto &proxy = dynamic_cast<SETranslatingPortProxy &>(
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ntc->getMemProxy());
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proxy.setPageTable(np->pTable);
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np->memState = memState;
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} else {
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