cpu, sim: Return PortProxy &s from all the proxy accessors.

This is a step towards merging the accessors for SE and FS modes.

Change-Id: I76818ab88b97097ac363e243be9cc1911b283090
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18579
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
This commit is contained in:
Gabe Black
2019-05-02 01:33:31 -07:00
parent f349b0845c
commit 39896bd265
8 changed files with 19 additions and 20 deletions

View File

@@ -133,7 +133,7 @@ ThreadState::getPhysProxy()
return *physProxy;
}
FSTranslatingPortProxy &
PortProxy &
ThreadState::getVirtProxy()
{
assert(FullSystem);
@@ -141,7 +141,7 @@ ThreadState::getVirtProxy()
return *virtProxy;
}
SETranslatingPortProxy &
PortProxy &
ThreadState::getMemProxy()
{
assert(!FullSystem);