cpu, sim: Return PortProxy &s from all the proxy accessors.

This is a step towards merging the accessors for SE and FS modes.

Change-Id: I76818ab88b97097ac363e243be9cc1911b283090
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18579
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

src/cpu/thread_context.hh

@@ -65,8 +65,6 @@ class BaseTLB;
 class CheckerCPU;
 class Checkpoint;
 class EndQuiesceEvent;
-class SETranslatingPortProxy;
-class FSTranslatingPortProxy;
 class PortProxy;
 class Process;
 class System;
@@ -152,7 +150,7 @@ class ThreadContext
 
     virtual PortProxy &getPhysProxy() = 0;
 
-    virtual FSTranslatingPortProxy &getVirtProxy() = 0;
+    virtual PortProxy &getVirtProxy() = 0;
 
     /**
      * Initialise the physical and virtual port proxies and tie them to
@@ -162,7 +160,7 @@ class ThreadContext
      */
     virtual void initMemProxies(ThreadContext *tc) = 0;
 
-    virtual SETranslatingPortProxy &getMemProxy() = 0;
+    virtual PortProxy &getMemProxy() = 0;
 
     virtual Process *getProcessPtr() = 0;