cpu, sim: Return PortProxy &s from all the proxy accessors.

This is a step towards merging the accessors for SE and FS modes.

Change-Id: I76818ab88b97097ac363e243be9cc1911b283090
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18579
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

src/cpu/o3/thread_context.hh

@@ -132,7 +132,7 @@ class O3ThreadContext : public ThreadContext
 
     PortProxy &getPhysProxy() override { return thread->getPhysProxy(); }
 
-    FSTranslatingPortProxy &getVirtProxy() override;
+    PortProxy &getVirtProxy() override;
 
     void
     initMemProxies(ThreadContext *tc) override
@@ -140,7 +140,7 @@ class O3ThreadContext : public ThreadContext
         thread->initMemProxies(tc);
     }
 
-    SETranslatingPortProxy &
+    PortProxy &
     getMemProxy() override
     {
         return thread->getMemProxy();

src/cpu/o3/thread_context_impl.hh

@@ -54,7 +54,7 @@
 #include "debug/O3CPU.hh"
 
 template <class Impl>
-FSTranslatingPortProxy&
+PortProxy&
 O3ThreadContext<Impl>::getVirtProxy()
 {
     return thread->getVirtProxy();