misc: Replace namespace Trace with lowercase trace

This is what the coding style demands

Change-Id: Ida6a71ad9c2c02cccd584bbaf37a6da751c5b856
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/63891
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>

src/cpu/CPUTracers.py

@@ -31,18 +31,18 @@ from m5.objects.InstTracer import InstTracer
 
 class ExeTracer(InstTracer):
     type = "ExeTracer"
-    cxx_class = "gem5::Trace::ExeTracer"
+    cxx_class = "gem5::trace::ExeTracer"
     cxx_header = "cpu/exetrace.hh"
 
 
 class IntelTrace(InstTracer):
     type = "IntelTrace"
-    cxx_class = "gem5::Trace::IntelTrace"
+    cxx_class = "gem5::trace::IntelTrace"
     cxx_header = "cpu/inteltrace.hh"
 
 
 class NativeTrace(ExeTracer):
     abstract = True
     type = "NativeTrace"
-    cxx_class = "gem5::Trace::NativeTrace"
+    cxx_class = "gem5::trace::NativeTrace"
     cxx_header = "cpu/nativetrace.hh"

src/cpu/InstPBTrace.py

@@ -32,6 +32,6 @@ from m5.objects.InstTracer import InstTracer
 
 class InstPBTrace(InstTracer):
     type = "InstPBTrace"
-    cxx_class = "gem5::Trace::InstPBTrace"
+    cxx_class = "gem5::trace::InstPBTrace"
     cxx_header = "cpu/inst_pb_trace.hh"
     file_name = Param.String("Instruction trace output file")

src/cpu/base.hh

@@ -255,7 +255,7 @@ class BaseCPU : public ClockedObject
   protected:
     std::vector<ThreadContext *> threadContexts;
 
-    Trace::InstTracer * tracer;
+    trace::InstTracer * tracer;
 
   public:
 
@@ -265,7 +265,7 @@ class BaseCPU : public ClockedObject
     static const uint32_t invldPid = std::numeric_limits<uint32_t>::max();
 
     /// Provide access to the tracer pointer
-    Trace::InstTracer * getTracer() { return tracer; }
+    trace::InstTracer * getTracer() { return tracer; }
 
     /// Notify the CPU that the indicated context is now active.
     virtual void activateContext(ThreadID thread_num);

src/cpu/checker/cpu_impl.hh

@@ -346,7 +346,7 @@ Checker<DynInstPtr>::verify(const DynInstPtr &completed_inst)
         if (fault == NoFault) {
             // Execute Checker instruction and trace
             if (!unverifiedInst->isUnverifiable()) {
-                Trace::InstRecord *traceData = tracer->getInstRecord(curTick(),
+                trace::InstRecord *traceData = tracer->getInstRecord(curTick(),
                                                            tc,
                                                            curStaticInst,
                                                            pcState(),

src/cpu/exetrace.cc

@@ -54,10 +54,10 @@
 namespace gem5
 {
 
-namespace Trace {
+namespace trace {
 
 void
-Trace::ExeTracerRecord::traceInst(const StaticInstPtr &inst, bool ran)
+ExeTracerRecord::traceInst(const StaticInstPtr &inst, bool ran)
 {
     std::stringstream outs;
 
@@ -142,13 +142,13 @@ Trace::ExeTracerRecord::traceInst(const StaticInstPtr &inst, bool ran)
     //
     outs << std::endl;
 
-    Trace::getDebugLogger()->dprintf_flag(
+    trace::getDebugLogger()->dprintf_flag(
         when, thread->getCpuPtr()->name(), "ExecEnable", "%s",
         outs.str().c_str());
 }
 
 void
-Trace::ExeTracerRecord::dump()
+ExeTracerRecord::dump()
 {
     /*
      * The behavior this check tries to achieve is that if ExecMacro is on,
@@ -170,5 +170,5 @@ Trace::ExeTracerRecord::dump()
     }
 }
 
-} // namespace Trace
+} // namespace trace
 } // namespace gem5

src/cpu/exetrace.hh

@@ -42,7 +42,7 @@ namespace gem5
 
 class ThreadContext;
 
-namespace Trace {
+namespace trace {
 
 class ExeTracerRecord : public InstRecord
 {
@@ -79,7 +79,7 @@ class ExeTracer : public InstTracer
     }
 };
 
-} // namespace Trace
+} // namespace trace
 } // namespace gem5
 
 #endif // __CPU_EXETRACE_HH__

src/cpu/inst_pb_trace.cc

@@ -50,7 +50,7 @@
 namespace gem5
 {
 
-namespace Trace {
+namespace trace {
 
 ProtoOutputStream *InstPBTrace::traceStream;
 
@@ -177,5 +177,5 @@ InstPBTrace::traceMem(StaticInstPtr si, Addr a, Addr s, unsigned f)
 
 }
 
-} // namespace Trace
+} // namespace trace
 } // namespace gem5

src/cpu/inst_pb_trace.hh

@@ -55,7 +55,7 @@ namespace gem5
 
 class ThreadContext;
 
-namespace Trace {
+namespace trace {
 
 /**
  * This in an instruction tracer that records the flow of instructions through
@@ -136,7 +136,7 @@ class InstPBTrace : public InstTracer
     friend class InstPBTraceRecord;
 };
 
-} // namespace Trace
+} // namespace trace
 } // namespace gem5
 
 #endif // __CPU_INST_PB_TRACE_HH__

src/cpu/inteltrace.cc

@@ -36,12 +36,12 @@
 namespace gem5
 {
 
-namespace Trace {
+namespace trace {
 
 void
-Trace::IntelTraceRecord::dump()
+IntelTraceRecord::dump()
 {
-    std::ostream &outs = Trace::output();
+    std::ostream &outs = trace::output();
     ccprintf(outs, "%7d ) ", when);
     outs << "0x" << std::hex << pc->instAddr() << ":\t";
     if (staticInst->isLoad()) {
@@ -52,5 +52,5 @@ Trace::IntelTraceRecord::dump()
     outs << std::endl;
 }
 
-} // namespace Trace
+} // namespace trace
 } // namespace gem5

src/cpu/inteltrace.hh

@@ -40,7 +40,7 @@
 namespace gem5
 {
 
-namespace Trace {
+namespace trace {
 
 class IntelTraceRecord : public InstRecord
 {
@@ -75,7 +75,7 @@ class IntelTrace : public InstTracer
     }
 };
 
-} // namespace Trace
+} // namespace trace
 } // namespace gem5
 
 #endif // __CPU_INTELTRACE_HH__

src/cpu/minor/dyn_inst.hh

@@ -173,7 +173,7 @@ class MinorDynInst : public RefCounted
     InstId id;
 
     /** Trace information for this instruction's execution */
-    Trace::InstRecord *traceData = nullptr;
+    trace::InstRecord *traceData = nullptr;
 
     /** The fetch address of this instruction */
     std::unique_ptr<PCStateBase> pc;

src/cpu/nativetrace.cc

@@ -36,7 +36,7 @@
 namespace gem5
 {
 
-namespace Trace {
+namespace trace {
 
 NativeTrace::NativeTrace(const Params &p)
     : ExeTracer(p)
@@ -55,7 +55,7 @@ NativeTrace::NativeTrace(const Params &p)
 }
 
 void
-Trace::NativeTraceRecord::dump()
+NativeTraceRecord::dump()
 {
     //Don't print what happens for each micro-op, just print out
     //once at the last op, and for regular instructions.
@@ -63,5 +63,5 @@ Trace::NativeTraceRecord::dump()
         parent->check(this);
 }
 
-} // namespace Trace
+} // namespace trace
 } // namespace gem5

src/cpu/nativetrace.hh

@@ -44,7 +44,7 @@ namespace gem5
 
 class ThreadContext;
 
-namespace Trace {
+namespace trace {
 
 class NativeTrace;
 
@@ -117,7 +117,7 @@ class NativeTrace : public ExeTracer
     check(NativeTraceRecord *record) = 0;
 };
 
-} // namespace Trace
+} // namespace trace
 } // namespace gem5
 
 #endif // __CPU_NATIVETRACE_HH__

src/cpu/nop_static_inst.cc

@@ -43,7 +43,7 @@ class NopStaticInst : public StaticInst
     NopStaticInst() : StaticInst("gem5 nop", No_OpClass) {}
 
     Fault
-    execute(ExecContext *xc, Trace::InstRecord *traceData) const override
+    execute(ExecContext *xc, trace::InstRecord *traceData) const override
     {
         return NoFault;
     }

src/cpu/o3/dyn_inst.hh

@@ -137,7 +137,7 @@ class DynInst : public ExecContext, public RefCounted
     Fault fault = NoFault;
 
     /** InstRecord that tracks this instructions. */
-    Trace::InstRecord *traceData = nullptr;
+    trace::InstRecord *traceData = nullptr;
 
   protected:
     enum Status

src/cpu/simple/base.hh

@@ -68,7 +68,7 @@ class Process;
 class Processor;
 class ThreadContext;
 
-namespace Trace
+namespace trace
 {
     class InstRecord;
 }
@@ -94,7 +94,7 @@ class BaseSimpleCPU : public BaseCPU
     virtual ~BaseSimpleCPU();
     void wakeup(ThreadID tid) override;
   public:
-    Trace::InstRecord *traceData;
+    trace::InstRecord *traceData;
     CheckerCPU *checker;
 
     std::vector<SimpleExecContext*> threadInfo;

src/cpu/static_inst.hh

@@ -72,10 +72,10 @@ namespace loader
 class SymbolTable;
 } // namespace loader
 
-namespace Trace
+namespace trace
 {
 class InstRecord;
-} // namespace Trace
+} // namespace trace
 
 /**
  * Base, ISA-independent static instruction class.
@@ -283,17 +283,17 @@ class StaticInst : public RefCounted, public StaticInstFlags
     virtual ~StaticInst() {};
 
     virtual Fault execute(ExecContext *xc,
-            Trace::InstRecord *traceData) const = 0;
+            trace::InstRecord *traceData) const = 0;
 
     virtual Fault
-    initiateAcc(ExecContext *xc, Trace::InstRecord *traceData) const
+    initiateAcc(ExecContext *xc, trace::InstRecord *traceData) const
     {
         panic("initiateAcc not defined!");
     }
 
     virtual Fault
     completeAcc(Packet *pkt, ExecContext *xc,
-            Trace::InstRecord *trace_data) const
+            trace::InstRecord *trace_data) const
     {
         panic("completeAcc not defined!");
     }