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Power: Change bitfield name to avoid conflicts with range_map

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This patch changes the name of a bitfield from W to W_FIELD to avoid
clashes with W being used as a class (typename) in the templatized
range_map. It also changes L to L_FIELD to avoid future problems. The
problem manifestes itself when the CPU includes a header that in turn
includes range_map.hh. The relevant parts of the decoder are updated.
This commit is contained in:
Andreas Hansson
2012-03-26 05:35:24 -04:00
parent ca9790a2db
commit 312efd742e
2 changed files with 8 additions and 5 deletions
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6
src/arch/power/isa/bitfields.isa
View File

@@ -75,8 +75,10 @@ def bitfield BF <25:23>;
// Fields for FPSCR manipulation instructions
def bitfield FLM <24:17>;
def bitfield L <25>;
def bitfield W <16>;
// Named so to avoid conflicts with potential template typenames
def bitfield L_FIELD <25>;
// Named so to avoid conflicts with range_map.hh
def bitfield W_FIELD <16>;
// Named so to avoid conflicts with range.hh
def bitfield U_FIELD <15:12>;

7
src/arch/power/isa/decoder.isa
View File

@@ -571,14 +571,15 @@ decode OPCODE default Unknown::unknown() {
}});
583: mffs({{ Ft_uq = FPSCR; }});
134: mtfsfi({{
FPSCR = insertCRField(FPSCR, BF + (8 * (1 - W)), U_FIELD);
FPSCR = insertCRField(FPSCR, BF + (8 * (1 - W_FIELD)),
U_FIELD);
}});
711: mtfsf({{
if (L == 1) { FPSCR = Fb_uq; }
if (L_FIELD == 1) { FPSCR = Fb_uq; }
else {
for (int i = 0; i < 8; ++i) {
if (bits(FLM, i) == 1) {
int k = 4 * (i + (8 * (1 - W)));
int k = 4 * (i + (8 * (1 - W_FIELD)));
FPSCR = insertBits(FPSCR, k, k + 3,
bits(Fb_uq, k, k + 3));
}