ARM: Set ITSTATE correctly after FlushPipe

2011-02-23 15:10:50 -06:00
parent 916c7f162d
commit 2eb19dac65
1 changed files with 1 additions and 0 deletions
--- a/src/arch/arm/faults.cc
+++ b/src/arch/arm/faults.cc
@@ -220,6 +220,7 @@ FlushPipe::invoke(ThreadContext *tc, StaticInstPtr inst) {
    // start refetching from the next instruction.
    PCState pc = tc->pcState();
    assert(inst);
+    pc.forcedItState(inst->machInst.newItstate);
    inst->advancePC(pc);
    tc->pcState(pc);
 }