dev: Style fixes in the ARM HDLCD device.
Change-Id: I230e0e0db879a56bc23c3ed439b9722e76cdd8e4 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38484 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
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@@ -65,25 +65,9 @@ HDLcd::HDLcd(const HDLcdParams &p)
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pixelBufferSize(p.pixel_buffer_size),
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virtRefreshRate(p.virt_refresh_rate),
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// Registers
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version(VERSION_RESETV),
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int_rawstat(0), int_mask(0),
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fb_base(0), fb_line_length(0), fb_line_count(0), fb_line_pitch(0),
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bus_options(BUS_OPTIONS_RESETV),
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v_sync(0), v_back_porch(0), v_data(0), v_front_porch(0),
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h_sync(0), h_back_porch(0), h_data(0), h_front_porch(0),
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polarities(0),
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command(0),
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pixel_format(0),
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red_select(0), green_select(0), blue_select(0),
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virtRefreshEvent([this]{ virtRefresh(); }, name()),
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// Other
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imgFormat(p.frame_format), pic(NULL), conv(PixelConverter::rgba8888_le),
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imgFormat(p.frame_format),
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pixelPump(*this, *p.pxl_clk, p.pixel_chunk),
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stats(this)
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{
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@@ -93,10 +77,6 @@ HDLcd::HDLcd(const HDLcdParams &p)
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imgWriter = createImgWriter(imgFormat, &pixelPump.fb);
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}
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HDLcd::~HDLcd()
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{
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}
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HDLcd::
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HDLcdStats::HDLcdStats(Stats::Group *parent)
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: Stats::Group(parent, "HDLcd"),
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@@ -234,12 +214,12 @@ HDLcd::read(PacketPtr pkt)
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assert(pkt->getAddr() >= pioAddr &&
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pkt->getAddr() < pioAddr + pioSize);
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const Addr daddr(pkt->getAddr() - pioAddr);
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const Addr daddr = pkt->getAddr() - pioAddr;
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panic_if(pkt->getSize() != 4,
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"Unhandled read size (address: 0x.4x, size: %u)",
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daddr, pkt->getSize());
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const uint32_t data(readReg(daddr));
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const uint32_t data = readReg(daddr);
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DPRINTF(HDLcd, "read register 0x%04x: 0x%x\n", daddr, data);
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pkt->setLE<uint32_t>(data);
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@@ -254,11 +234,11 @@ HDLcd::write(PacketPtr pkt)
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assert(pkt->getAddr() >= pioAddr &&
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pkt->getAddr() < pioAddr + pioSize);
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const Addr daddr(pkt->getAddr() - pioAddr);
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const Addr daddr = pkt->getAddr() - pioAddr;
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panic_if(pkt->getSize() != 4,
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"Unhandled read size (address: 0x.4x, size: %u)",
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daddr, pkt->getSize());
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const uint32_t data(pkt->getLE<uint32_t>());
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const uint32_t data = pkt->getLE<uint32_t>();
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DPRINTF(HDLcd, "write register 0x%04x: 0x%x\n", daddr, data);
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writeReg(daddr, data);
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@@ -430,8 +410,8 @@ HDLcd::writeReg(Addr offset, uint32_t value)
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PixelConverter
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HDLcd::pixelConverter() const
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{
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ByteOrder byte_order(
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pixel_format.big_endian ? ByteOrder::big : ByteOrder::little);
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ByteOrder byte_order =
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pixel_format.big_endian ? ByteOrder::big : ByteOrder::little;
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/* Some Linux kernels have a broken driver that swaps the red and
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* blue color select registers. */
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@@ -467,17 +447,15 @@ HDLcd::createDmaEngine()
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return;
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}
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const uint32_t dma_burst_flags(bus_options.burst_len);
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const uint32_t dma_burst_len(
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dma_burst_flags ?
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(1UL << (findMsbSet(dma_burst_flags) - 1)) :
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MAX_BURST_LEN);
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const uint32_t dma_burst_flags = bus_options.burst_len;
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const uint32_t dma_burst_len = dma_burst_flags ?
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(1UL << (findMsbSet(dma_burst_flags) - 1)) : MAX_BURST_LEN;
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// Some drivers seem to set the DMA line count incorrectly. This
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// could either be a driver bug or a specification bug. Unlike for
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// timings, the specification does not require 1 to be added to
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// the DMA engine's line count.
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const uint32_t dma_lines(
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fb_line_count + (workaroundDmaLineCount ? 1 : 0));
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const uint32_t dma_lines =
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fb_line_count + (workaroundDmaLineCount ? 1 : 0);
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dmaEngine.reset(new DmaEngine(
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*this, pixelBufferSize,
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@@ -583,7 +561,7 @@ HDLcd::pxlFrameDone()
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void
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HDLcd::setInterrupts(uint32_t ints, uint32_t mask)
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{
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const bool old_ints(intStatus());
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const bool old_ints = intStatus();
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int_mask = mask;
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int_rawstat = ints;
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@@ -673,7 +651,7 @@ HDLcd::DmaEngine::onIdle()
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void
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HDLcd::PixelPump::dumpSettings()
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{
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const DisplayTimings &t(timings());
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const DisplayTimings &t = timings();
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inform("PixelPump width: %u", t.width);
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inform("PixelPump height: %u", t.height);
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@@ -91,7 +91,6 @@ class HDLcd: public AmbaDmaDevice
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{
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public:
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HDLcd(const HDLcdParams &p);
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~HDLcd();
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void serialize(CheckpointOut &cp) const override;
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void unserialize(CheckpointIn &cp) override;
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@@ -226,28 +225,31 @@ class HDLcd: public AmbaDmaDevice
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* HDLCD register contents.
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*/
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/**@{*/
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const VersionReg version; /**< Version register */
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uint32_t int_rawstat; /**< Interrupt raw status register */
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uint32_t int_mask; /**< Interrupt mask register */
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uint32_t fb_base; /**< Frame buffer base address register */
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uint32_t fb_line_length; /**< Frame buffer Line length register */
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FbLineCountReg fb_line_count; /**< Frame buffer Line count register */
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int32_t fb_line_pitch; /**< Frame buffer Line pitch register */
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BusOptsReg bus_options; /**< Bus options register */
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TimingReg v_sync; /**< Vertical sync width register */
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TimingReg v_back_porch; /**< Vertical back porch width register */
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TimingReg v_data; /**< Vertical data width register */
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TimingReg v_front_porch; /**< Vertical front porch width register */
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TimingReg h_sync; /**< Horizontal sync width register */
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TimingReg h_back_porch; /**< Horizontal back porch width register */
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TimingReg h_data; /**< Horizontal data width register */
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TimingReg h_front_porch; /**< Horizontal front porch width reg */
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PolaritiesReg polarities; /**< Polarities register */
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CommandReg command; /**< Command register */
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PixelFormatReg pixel_format; /**< Pixel format register */
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ColorSelectReg red_select; /**< Red color select register */
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ColorSelectReg green_select; /**< Green color select register */
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ColorSelectReg blue_select; /**< Blue color select register */
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const VersionReg version = VERSION_RESETV;
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/**< Version register */
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uint32_t int_rawstat = 0; /**< Interrupt raw status register */
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uint32_t int_mask = 0; /**< Interrupt mask register */
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uint32_t fb_base = 0; /**< Frame buffer base address register */
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uint32_t fb_line_length = 0; /**< Frame buffer Line length register */
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/**< Frame buffer Line count register */
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FbLineCountReg fb_line_count = 0;
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int32_t fb_line_pitch = 0; /**< Frame buffer Line pitch register */
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BusOptsReg bus_options = BUS_OPTIONS_RESETV;
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/**< Bus options register */
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TimingReg v_sync = 0; /**< Vertical sync width register */
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TimingReg v_back_porch = 0; /**< Vertical back porch width register */
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TimingReg v_data = 0; /**< Vertical data width register */
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TimingReg v_front_porch = 0; /**< Vertical front porch width register */
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TimingReg h_sync = 0; /**< Horizontal sync width register */
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TimingReg h_back_porch = 0; /**< Horizontal back porch width reg */
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TimingReg h_data = 0; /**< Horizontal data width register */
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TimingReg h_front_porch = 0; /**< Horizontal front porch width reg */
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PolaritiesReg polarities = 0; /**< Polarities register */
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CommandReg command = 0; /**< Command register */
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PixelFormatReg pixel_format = 0;/**< Pixel format register */
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ColorSelectReg red_select = 0; /**< Red color select register */
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ColorSelectReg green_select = 0;/**< Green color select register */
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ColorSelectReg blue_select = 0; /**< Blue color select register */
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/** @} */
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uint32_t readReg(Addr offset);
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@@ -298,7 +300,9 @@ class HDLcd: public AmbaDmaDevice
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* @see setInterrupts
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* @param ints Set of interrupts to raise
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*/
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void intRaise(uint32_t ints) {
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void
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intRaise(uint32_t ints)
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{
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setInterrupts(int_rawstat | ints, int_mask);
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}
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@@ -308,7 +312,9 @@ class HDLcd: public AmbaDmaDevice
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* @see setInterrupts
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* @param ints Set of interrupts to clear
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*/
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void intClear(uint32_t ints) {
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void
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intClear(uint32_t ints)
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{
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setInterrupts(int_rawstat & ~ints, int_mask);
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}
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@@ -330,7 +336,9 @@ class HDLcd: public AmbaDmaDevice
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void onVSyncBegin() override { return parent.pxlVSyncBegin(); }
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void onVSyncEnd() override { return parent.pxlVSyncEnd(); }
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void onUnderrun(unsigned x, unsigned y) override {
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void
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onUnderrun(unsigned x, unsigned y) override
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{
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parent.pxlUnderrun();
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}
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@@ -351,10 +359,10 @@ class HDLcd: public AmbaDmaDevice
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Enums::ImageFormat imgFormat;
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/** Picture of what the current frame buffer looks like */
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OutputStream *pic;
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OutputStream *pic = nullptr;
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/** Cached pixel converter, set when the converter is enabled. */
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PixelConverter conv;
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PixelConverter conv = PixelConverter::rgba8888_le;
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PixelPump pixelPump;
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