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mem-cache: Add missing overrides to BaseCache

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Change-Id: I6a3a57e3067c247bd6ce6f01ac9459883f4aae2c
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/3880
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
This commit is contained in:
Andreas Sandberg
2017-06-13 11:28:17 +01:00
parent 1d7ff84f12
commit 2beb743556
1 changed files with 6 additions and 6 deletions
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12
src/mem/cache/base.hh vendored
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@@ -228,7 +228,7 @@ class BaseCache : public MemObject
/**
* Write back dirty blocks in the cache using functional accesses.
*/
virtual void memWriteback() = 0;
virtual void memWriteback() override = 0;
/**
* Invalidates all blocks in the cache.
*
@@ -236,7 +236,7 @@ class BaseCache : public MemObject
* memory. Make sure to call functionalWriteback() first if you
* want the to write them to memory.
*/
virtual void memInvalidate() = 0;
virtual void memInvalidate() override = 0;
/**
* Determine if there are any dirty blocks in the cache.
*
@@ -460,18 +460,18 @@ class BaseCache : public MemObject
/**
* Register stats for this object.
*/
virtual void regStats();
virtual void regStats() override;
public:
BaseCache(const BaseCacheParams *p, unsigned blk_size);
~BaseCache() {}
virtual void init();
virtual void init() override;
virtual BaseMasterPort &getMasterPort(const std::string &if_name,
PortID idx = InvalidPortID);
PortID idx = InvalidPortID) override;
virtual BaseSlavePort &getSlavePort(const std::string &if_name,
PortID idx = InvalidPortID);
PortID idx = InvalidPortID) override;
/**
* Query block size of a cache.