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x86: Convert X86 to use local reg index storage.

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Change-Id: I42bd3e08ebcffe25e2f366be82702b3c04225e92
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/36883
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Gabe Black
2020-11-01 21:48:45 -08:00
parent cb40dd137a
commit 2b5b472667
10 changed files with 91 additions and 29 deletions
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34
src/arch/x86/isa/formats/basic.isa
View File

@@ -38,25 +38,29 @@
// Basic instruction class declaration template.
def template BasicDeclare {{
/**
* Static instruction class for "%(mnemonic)s".
*/
class %(class_name)s : public %(base_class)s
{
public:
// Constructor.
%(class_name)s(ExtMachInst machInst);
Fault execute(ExecContext *, Trace::InstRecord *) const override;
};
/**
* Static instruction class for "%(mnemonic)s".
*/
class %(class_name)s : public %(base_class)s
{
private:
%(reg_idx_arr_decl)s;
public:
// Constructor.
%(class_name)s(ExtMachInst machInst);
Fault execute(ExecContext *, Trace::InstRecord *) const override;
};
}};
// Basic instruction class constructor template.
def template BasicConstructor {{
%(class_name)s::%(class_name)s(ExtMachInst machInst)
: %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
{
%(constructor)s;
}
%(class_name)s::%(class_name)s(ExtMachInst machInst) :
%(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
{
%(set_reg_idx_arr)s;
%(constructor)s;
}
}};
// Basic instruction class execute method template.

5
src/arch/x86/isa/formats/monitor_mwait.isa
View File

@@ -47,7 +47,10 @@ def format MonitorInst(code, *opt_flags) {{
def template MwaitDeclare {{
class %(class_name)s : public %(base_class)s
{
public:
private:
%(reg_idx_arr_decl)s;
public:
// Constructor.
%(class_name)s(ExtMachInst machInst);
Fault execute(ExecContext *, Trace::InstRecord *) const override;

34
src/arch/x86/isa/microops/debug.isa
View File

@@ -68,19 +68,6 @@ output header {{
return response.str();
}
};
class MicroDebugFlags : public MicroDebug
{
protected:
uint8_t cc;
public:
MicroDebugFlags(ExtMachInst _machInst, const char *mnem,
const char *instMnem, uint64_t setFlags,
GenericISA::M5DebugFault *_fault, uint8_t _cc);
Fault execute(ExecContext *, Trace::InstRecord *) const override;
};
}};
output decoder {{
@@ -93,6 +80,24 @@ output decoder {{
{}
}};
def template MicroDebugFlagsDeclare {{
class %(class_name)s : public %(base_class)s
{
private:
%(reg_idx_arr_decl)s;
protected:
uint8_t cc;
public:
%(class_name)s(ExtMachInst _machInst, const char *mnem,
const char *instMnem, uint64_t setFlags,
GenericISA::M5DebugFault *_fault, uint8_t _cc);
Fault execute(ExecContext *, Trace::InstRecord *) const override;
};
}};
def template MicroDebugFlagsExecute {{
Fault
%(class_name)s::execute(ExecContext *xc,
@@ -116,6 +121,7 @@ def template MicroDebugFlagsConstructor {{
%(base_class)s(machInst, mnem, instMnem, setFlags, _fault),
cc(_cc)
{
%(set_reg_idx_arr)s;
%(constructor)s;
}
}};
@@ -125,6 +131,8 @@ let {{
{"code": "",
"cond_test": "checkCondition(ccFlagBits | cfofBits | \
dfBit | ecfBit | ezfBit, cc)"})
header_output = MicroDebugFlagsDeclare.subst(iop)
exec_output = MicroDebugFlagsExecute.subst(iop)
decoder_output = MicroDebugFlagsConstructor.subst(iop)
}};

4
src/arch/x86/isa/microops/fpop.isa
View File

@@ -76,6 +76,9 @@ def template MicroFpOpExecute {{
def template MicroFpOpDeclare {{
class %(class_name)s : public %(base_class)s
{
private:
%(reg_idx_arr_decl)s;
public:
%(class_name)s(ExtMachInst _machInst,
const char * instMnem, uint64_t setFlags,
@@ -95,6 +98,7 @@ def template MicroFpOpConstructor {{
_src1, _src2, _dest, _dataSize, _spm,
%(op_class)s)
{
%(set_reg_idx_arr)s;
%(constructor)s;
}
}};

11
src/arch/x86/isa/microops/ldstop.isa
View File

@@ -70,6 +70,9 @@ def template MicroLeaExecute {{
def template MicroLeaDeclare {{
class %(class_name)s : public %(base_class)s
{
private:
%(reg_idx_arr_decl)s;
public:
%(class_name)s(ExtMachInst _machInst,
const char * instMnem, uint64_t setFlags,
@@ -220,6 +223,9 @@ def template MicroStoreCompleteAcc {{
def template MicroLdStOpDeclare {{
class %(class_name)s : public %(base_class)s
{
private:
%(reg_idx_arr_decl)s;
public:
%(class_name)s(ExtMachInst _machInst,
const char * instMnem, uint64_t setFlags,
@@ -241,6 +247,9 @@ def template MicroLdStOpDeclare {{
def template MicroLdStSplitOpDeclare {{
class %(class_name)s : public %(base_class)s
{
private:
%(reg_idx_arr_decl)s;
public:
%(class_name)s(ExtMachInst _machInst,
const char * instMnem, uint64_t setFlags,
@@ -270,6 +279,7 @@ def template MicroLdStOpConstructor {{
_disp, _segment, _data,
_dataSize, _addressSize, _memFlags, %(op_class)s)
{
%(set_reg_idx_arr)s;
%(constructor)s;
}
}};
@@ -287,6 +297,7 @@ def template MicroLdStSplitOpConstructor {{
_disp, _segment, _dataLow, _dataHi,
_dataSize, _addressSize, _memFlags, %(op_class)s)
{
%(set_reg_idx_arr)s;
%(constructor)s;
}
}};

4
src/arch/x86/isa/microops/limmop.isa
View File

@@ -54,6 +54,9 @@ def template MicroLimmOpExecute {{
def template MicroLimmOpDeclare {{
class %(class_name)s : public X86ISA::X86MicroopBase
{
private:
%(reg_idx_arr_decl)s;
protected:
const RegIndex dest;
const uint64_t imm;
@@ -96,6 +99,7 @@ def template MicroLimmOpConstructor {{
setFlags, %(op_class)s),
dest(_dest.index()), imm(_imm), dataSize(_dataSize)
{
%(set_reg_idx_arr)s;
foldOBit = (dataSize == 1 && !machInst.rex.present) ? 1 << 6 : 0;
%(constructor)s;
}

8
src/arch/x86/isa/microops/mediaop.isa
View File

@@ -49,6 +49,9 @@ def template MediaOpExecute {{
def template MediaOpRegDeclare {{
class %(class_name)s : public %(base_class)s
{
private:
%(reg_idx_arr_decl)s;
public:
%(class_name)s(ExtMachInst _machInst,
const char * instMnem, uint64_t setFlags,
@@ -63,6 +66,9 @@ def template MediaOpImmDeclare {{
class %(class_name)s : public %(base_class)s
{
private:
%(reg_idx_arr_decl)s;
public:
%(class_name)s(ExtMachInst _machInst,
const char * instMnem, uint64_t setFlags,
@@ -82,6 +88,7 @@ def template MediaOpRegConstructor {{
_src1, _src2, _dest, _srcSize, _destSize, _ext,
%(op_class)s)
{
%(set_reg_idx_arr)s;
%(constructor)s;
}
}};
@@ -95,6 +102,7 @@ def template MediaOpImmConstructor {{
_src1, _imm8, _dest, _srcSize, _destSize, _ext,
%(op_class)s)
{
%(set_reg_idx_arr)s;
%(constructor)s;
}
}};

8
src/arch/x86/isa/microops/regop.isa
View File

@@ -103,6 +103,9 @@ def template MicroRegOpImmExecute {{
def template MicroRegOpDeclare {{
class %(class_name)s : public %(base_class)s
{
private:
%(reg_idx_arr_decl)s;
public:
%(class_name)s(ExtMachInst _machInst,
const char * instMnem, uint64_t setFlags,
@@ -123,6 +126,9 @@ def template MicroRegOpImmDeclare {{
class %(class_name)s : public %(base_class)s
{
private:
%(reg_idx_arr_decl)s;
public:
%(class_name)s(ExtMachInst _machInst,
const char * instMnem, uint64_t setFlags,
@@ -148,6 +154,7 @@ def template MicroRegOpConstructor {{
_src1, _src2, _dest, _dataSize, _ext,
%(op_class)s)
{
%(set_reg_idx_arr)s;
%(constructor)s;
%(cond_control_flag_init)s;
}
@@ -173,6 +180,7 @@ def template MicroRegOpImmConstructor {{
_src1, _imm8, _dest, _dataSize, _ext,
%(op_class)s)
{
%(set_reg_idx_arr)s;
%(constructor)s;
%(cond_control_flag_init)s;
}

4
src/arch/x86/isa/microops/seqop.isa
View File

@@ -57,6 +57,9 @@ output header {{
def template SeqOpDeclare {{
class %(class_name)s : public %(base_class)s
{
private:
%(reg_idx_arr_decl)s;
public:
%(class_name)s(ExtMachInst _machInst, const char * instMnem,
uint64_t setFlags, uint16_t _target, uint8_t _cc);
@@ -104,6 +107,7 @@ def template SeqOpConstructor {{
%(base_class)s(machInst, "%(mnemonic)s", instMnem,
setFlags, _target, _cc)
{
%(set_reg_idx_arr)s;
%(constructor)s;
%(cond_control_flag_init)s;
}

8
src/arch/x86/isa/microops/specop.isa
View File

@@ -77,6 +77,9 @@ output header {{
def template MicroFaultDeclare {{
class %(class_name)s : public %(base_class)s
{
private:
%(reg_idx_arr_decl)s;
public:
%(class_name)s(ExtMachInst _machInst, const char * instMnem,
uint64_t setFlags, Fault _fault, uint8_t _cc);
@@ -125,6 +128,7 @@ def template MicroFaultConstructor {{
Fault _fault, uint8_t _cc) :
%(base_class)s(machInst, instMnem, setFlags, _fault, _cc)
{
%(set_reg_idx_arr)s;
%(constructor)s;
}
}};
@@ -209,6 +213,9 @@ let {{
def template MicroFenceOpDeclare {{
class %(class_name)s : public X86ISA::X86MicroopBase
{
private:
%(reg_idx_arr_decl)s;
public:
%(class_name)s(ExtMachInst _machInst,
const char * instMnem,
@@ -224,6 +231,7 @@ def template MicroFenceOpConstructor {{
%(base_class)s(machInst, "%(mnemonic)s", instMnem,
setFlags, %(op_class)s)
{
%(set_reg_idx_arr)s;
%(constructor)s;
}
}};