misc: Stop including arch/vecregs.hh and fix transitive includes.

Change-Id: I7854e77517f52b7c19cdb91c67016315391fd87f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50255
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>

src/arch/arm/aapcs32.hh

@@ -34,6 +34,7 @@
 #include <utility>
 
 #include "arch/arm/regs/int.hh"
+#include "arch/arm/regs/vec.hh"
 #include "arch/arm/utility.hh"
 #include "base/intmath.hh"
 #include "cpu/thread_context.hh"

src/arch/arm/aapcs64.hh

@@ -34,6 +34,7 @@
 #include <utility>
 
 #include "arch/arm/regs/int.hh"
+#include "arch/arm/regs/vec.hh"
 #include "arch/arm/utility.hh"
 #include "base/intmath.hh"
 #include "cpu/thread_context.hh"

src/arch/arm/isa.hh

@@ -46,6 +46,7 @@
 #include "arch/arm/pcstate.hh"
 #include "arch/arm/regs/int.hh"
 #include "arch/arm/regs/misc.hh"
+#include "arch/arm/regs/vec.hh"
 #include "arch/arm/self_debug.hh"
 #include "arch/arm/system.hh"
 #include "arch/arm/types.hh"

src/arch/arm/system.hh

@@ -47,6 +47,7 @@
 #include <vector>
 
 #include "arch/arm/page_size.hh"
+#include "arch/arm/types.hh"
 #include "kern/linux/events.hh"
 #include "params/ArmSystem.hh"
 #include "sim/full_system.hh"

src/arch/arm/tracers/tarmac_base.hh

@@ -49,6 +49,7 @@
 #ifndef __ARCH_ARM_TRACERS_TARMAC_BASE_HH__
 #define __ARCH_ARM_TRACERS_TARMAC_BASE_HH__
 
+#include "arch/arm/types.hh"
 #include "base/trace.hh"
 #include "base/types.hh"
 #include "cpu/static_inst.hh"

src/cpu/exec_context.hh

@@ -42,7 +42,6 @@
 #ifndef __CPU_EXEC_CONTEXT_HH__
 #define __CPU_EXEC_CONTEXT_HH__
 
-#include "arch/vecregs.hh"
 #include "base/types.hh"
 #include "config/the_isa.hh"
 #include "cpu/base.hh"

src/cpu/o3/regfile.hh

@@ -46,7 +46,6 @@
 #include <vector>
 
 #include "arch/generic/isa.hh"
-#include "arch/vecregs.hh"
 #include "base/trace.hh"
 #include "config/the_isa.hh"
 #include "cpu/o3/comm.hh"

src/cpu/o3/rename_map.cc

@@ -43,7 +43,6 @@
 
 #include <vector>
 
-#include "arch/vecregs.hh"
 #include "cpu/o3/dyn_inst.hh"
 #include "cpu/reg_class.hh"
 #include "debug/Rename.hh"

src/cpu/o3/thread_context.cc

@@ -41,7 +41,6 @@
 
 #include "cpu/o3/thread_context.hh"
 
-#include "arch/vecregs.hh"
 #include "config/the_isa.hh"
 #include "debug/O3CPU.hh"
 

src/cpu/simple/exec_context.hh

@@ -41,7 +41,6 @@
 #ifndef __CPU_SIMPLE_EXEC_CONTEXT_HH__
 #define __CPU_SIMPLE_EXEC_CONTEXT_HH__
 
-#include "arch/vecregs.hh"
 #include "base/types.hh"
 #include "config/the_isa.hh"
 #include "cpu/base.hh"

src/cpu/simple_thread.hh

@@ -50,7 +50,6 @@
 #include "arch/generic/pcstate.hh"
 #include "arch/generic/tlb.hh"
 #include "arch/isa.hh"
-#include "arch/vecregs.hh"
 #include "base/logging.hh"
 #include "base/types.hh"
 #include "config/the_isa.hh"

src/cpu/thread_context.hh

@@ -48,7 +48,6 @@
 #include "arch/generic/htm.hh"
 #include "arch/generic/isa.hh"
 #include "arch/generic/pcstate.hh"
-#include "arch/vecregs.hh"
 #include "base/types.hh"
 #include "config/the_isa.hh"
 #include "cpu/pc_event.hh"

src/sim/insttracer.hh

@@ -44,7 +44,6 @@
 #include <memory>
 
 #include "arch/generic/pcstate.hh"
-#include "arch/vecregs.hh"
 #include "base/types.hh"
 #include "cpu/inst_res.hh"
 #include "cpu/inst_seq.hh"