arch-riscv: print information about faults.

Change-Id: Ic69b788d508bab1044b693860c7d942963bed3f9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25646
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
This commit is contained in:
Nils Asmussen
2020-02-24 13:45:22 +01:00
parent 6362e8b2d2
commit 25a538ff20

View File

@@ -2,6 +2,7 @@
* Copyright (c) 2016 RISC-V Foundation
* Copyright (c) 2016 The University of Virginia
* Copyright (c) 2018 TU Dresden
* Copyright (c) 2020 Barkhausen Institut
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -36,6 +37,7 @@
#include "arch/riscv/utility.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
#include "debug/Fault.hh"
#include "sim/debug.hh"
#include "sim/full_system.hh"
@@ -53,6 +55,9 @@ RiscvFault::invoke(ThreadContext *tc, const StaticInstPtr &inst)
{
PCState pcState = tc->pcState();
DPRINTFS(Fault, tc->getCpuPtr(), "Fault (%s) at PC: %s\n",
name(), pcState);
if (FullSystem) {
PrivilegeMode pp = (PrivilegeMode)tc->readMiscReg(MISCREG_PRV);
PrivilegeMode prv = PRV_M;