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X86: Create a common flag with a name to indicate high multiplies.

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This commit is contained in:
Gabe Black
2009-12-19 01:48:07 -08:00
parent e474079ddc
commit 2554511533
5 changed files with 30 additions and 23 deletions
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7
src/arch/x86/insts/micromediaop.hh
View File

@@ -36,6 +36,7 @@
namespace X86ISA
{
enum MediaFlag {
MediaMultHiOp = 1,
MediaScalarOp = 128
};
@@ -75,6 +76,12 @@ namespace X86ISA
{
return scalarOp() ? 1 : (sizeof(FloatRegBits) / size);
}
bool
multHi() const
{
return ext & MediaMultHiOp;
}
};
class MediaOpReg : public MediaOpBase

24
src/arch/x86/isa/insts/simd128/integer/arithmetic/multiplication.py
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@@ -55,23 +55,23 @@
microcode = '''
def macroop PMULHW_XMM_XMM {
mmuli xmml, xmml, xmmlm, size=2, ext=(0x2 | 0x8)
mmuli xmmh, xmmh, xmmhm, size=2, ext=(0x2 | 0x8)
mmuli xmml, xmml, xmmlm, size=2, ext = "0x2 |" + MultHi
mmuli xmmh, xmmh, xmmhm, size=2, ext = "0x2 |" + MultHi
};
def macroop PMULHW_XMM_M {
ldfp ufp1, seg, sib, "DISPLACEMENT", dataSize=8
ldfp ufp2, seg, sib, "DISPLACEMENT + 8", dataSize=8
mmuli xmml, xmml, ufp1, size=2, ext=(0x2 | 0x8)
mmuli xmmh, xmmh, ufp2, size=2, ext=(0x2 | 0x8)
mmuli xmml, xmml, ufp1, size=2, ext = "0x2 |" + MultHi
mmuli xmmh, xmmh, ufp2, size=2, ext = "0x2 |" + MultHi
};
def macroop PMULHW_XMM_P {
rdip t7
ldfp ufp1, seg, riprel, "DISPLACEMENT", dataSize=8
ldfp ufp2, seg, riprel, "DISPLACEMENT + 8", dataSize=8
mmuli xmml, xmml, ufp1, size=2, ext=(0x2 | 0x8)
mmuli xmmh, xmmh, ufp2, size=2, ext=(0x2 | 0x8)
mmuli xmml, xmml, ufp1, size=2, ext = "0x2 |" + MultHi
mmuli xmmh, xmmh, ufp2, size=2, ext = "0x2 |" + MultHi
};
def macroop PMULLW_XMM_XMM {
@@ -95,23 +95,23 @@ def macroop PMULLW_XMM_P {
};
def macroop PMULHUW_XMM_XMM {
mmuli xmml, xmml, xmmlm, size=2, ext=8
mmuli xmmh, xmmh, xmmhm, size=2, ext=8
mmuli xmml, xmml, xmmlm, size=2, ext = MultHi
mmuli xmmh, xmmh, xmmhm, size=2, ext = MultHi
};
def macroop PMULHUW_XMM_M {
ldfp ufp1, seg, sib, "DISPLACEMENT", dataSize=8
ldfp ufp2, seg, sib, "DISPLACEMENT + 8", dataSize=8
mmuli xmml, xmml, ufp1, size=2, ext=8
mmuli xmmh, xmmh, ufp2, size=2, ext=8
mmuli xmml, xmml, ufp1, size=2, ext = MultHi
mmuli xmmh, xmmh, ufp2, size=2, ext = MultHi
};
def macroop PMULHUW_XMM_P {
rdip t7
ldfp ufp1, seg, riprel, "DISPLACEMENT", dataSize=8
ldfp ufp2, seg, riprel, "DISPLACEMENT + 8", dataSize=8
mmuli xmml, xmml, ufp1, size=2, ext=8
mmuli xmmh, xmmh, ufp2, size=2, ext=8
mmuli xmml, xmml, ufp1, size=2, ext = MultHi
mmuli xmmh, xmmh, ufp2, size=2, ext = MultHi
};
def macroop PMULUDQ_XMM_XMM {

18
src/arch/x86/isa/insts/simd64/integer/arithmetic/multiplication.py
View File

@@ -55,18 +55,18 @@
microcode = '''
def macroop PMULHW_MMX_MMX {
mmuli mmx, mmx, mmxm, size=2, ext=(0x2 | 0x8)
mmuli mmx, mmx, mmxm, size=2, ext = "0x2 |" + MultHi
};
def macroop PMULHW_MMX_M {
ldfp ufp1, seg, sib, disp, dataSize=8
mmuli mmx, mmx, ufp1, size=2, ext=(0x2 | 0x8)
mmuli mmx, mmx, ufp1, size=2, ext = "0x2 |" + MultHi
};
def macroop PMULHW_MMX_P {
rdip t7
ldfp ufp1, seg, riprel, disp, dataSize=8
mmuli mmx, mmx, ufp1, size=2, ext=(0x2 | 0x8)
mmuli mmx, mmx, ufp1, size=2, ext = "0x2 |" + MultHi
};
def macroop PMULLW_MMX_MMX {
@@ -85,33 +85,33 @@ def macroop PMULLW_MMX_P {
};
def macroop PMULHRW_MMX_MMX {
mmuli mmx, mmx, mmxm, size=2, ext=(0x2 | 0x4 | 0x8)
mmuli mmx, mmx, mmxm, size=2, ext = "0x2 | 0x4 |" + MultHi
};
def macroop PMULHRW_MMX_M {
ldfp ufp1, seg, sib, disp, dataSize=8
mmuli mmx, mmx, ufp1, size=2, ext=(0x2 | 0x4 | 0x8)
mmuli mmx, mmx, ufp1, size=2, ext = "0x2 | 0x4 |" + MultHi
};
def macroop PMULHRW_MMX_P {
rdip t7
ldfp ufp1, seg, riprel, disp, dataSize=8
mmuli mmx, mmx, ufp1, size=2, ext=(0x2 | 0x4 | 0x8)
mmuli mmx, mmx, ufp1, size=2, ext = "0x2 | 0x4 |" + MultHi
};
def macroop PMULHUW_MMX_MMX {
mmuli mmx, mmx, mmxm, size=2, ext=8
mmuli mmx, mmx, mmxm, size=2, ext = MultHi
};
def macroop PMULHUW_MMX_M {
ldfp ufp1, seg, sib, disp, dataSize=8
mmuli mmx, mmx, ufp1, size=2, ext=8
mmuli mmx, mmx, ufp1, size=2, ext = MultHi
};
def macroop PMULHUW_MMX_P {
rdip t7
ldfp ufp1, seg, riprel, disp, dataSize=8
mmuli mmx, mmx, ufp1, size=2, ext=8
mmuli mmx, mmx, ufp1, size=2, ext = MultHi
};
def macroop PMULUDQ_MMX_MMX {

2
src/arch/x86/isa/microasm.isa
View File

@@ -181,7 +181,7 @@ let {{
'kernel_gs_base'):
assembler.symbols[reg] = regIdx("MISCREG_%s" % reg.upper())
for flag in ('Scalar',):
for flag in ('Scalar', 'MultHi'):
assembler.symbols[flag] = 'Media%sOp' % flag
# Code literal which forces a default 64 bit operand size in 64 bit mode.

2
src/arch/x86/isa/microops/mediaop.isa
View File

@@ -1043,7 +1043,7 @@ let {{
if (ext & 0x4)
resBits += (ULL(1) << (destBits - 1));
if (ext & 0x8)
if (multHi())
resBits >>= destBits;
int destHiIndex = (i + 1) * destBits - 1;