Updates to make SMP work.
dev/tsunami_cchip.cc:
updates to ipi handling chipset code
sim/system.cc:
debugSymbolTable, now has symbols from pal, console, and linux
--HG--
extra : convert_revision : c981d857f7e3d75f4c46172809e6d14e5f0a1238
This commit is contained in:
@@ -185,6 +185,48 @@ TsunamiCChip::write(MemReqPtr &req, const uint8_t *data)
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panic("TSDEV_CC_MTR write not implemented\n");
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return No_Fault;
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case TSDEV_CC_MISC:
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uint64_t ipreq;
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ipreq = (*(uint64_t*)data >> 12) & 0xF;
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//If it is bit 12-15, this is an IPI post
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if (ipreq) {
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for (int cpunum=0; cpunum < Tsunami::Max_CPUs; cpunum++) {
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// Check each cpu bit
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if (ipreq & (1 << cpunum)) {
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// Check if there is already an ipi (bits 8:11)
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if (!(misc & (0x100 << cpunum))) {
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misc |= (0x100 << cpunum);
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tsunami->intrctrl->post(cpunum,
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TheISA::INTLEVEL_IRQ3, 0);
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DPRINTF(IPI, "send IPI cpu=%d from=%d\n",
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cpunum, req->cpu_num);
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}
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}
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}
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supportedWrite = true;
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}
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//If it is bit 8-11, this is an IPI clear
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uint64_t ipintr;
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ipintr = (*(uint64_t*)data >> 8) & 0xF;
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if (ipintr) {
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for (int cpunum=0; cpunum < Tsunami::Max_CPUs; cpunum++) {
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// Check each cpu bit
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if (ipintr & (1 << cpunum)) {
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// Check if there is a pending ipi (bits 8:11)
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if (misc & (0x100 << cpunum)) {
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misc &= ~(0x100 << cpunum);
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tsunami->intrctrl->clear(cpunum,
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TheISA::INTLEVEL_IRQ3, 0);
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DPRINTF(IPI, "clear IPI IPI cpu=%d from=%d\n",
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cpunum, req->cpu_num);
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}
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}
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}
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supportedWrite = true;
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}
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//If it is the 4-7th bit, clear the RTC interrupt
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uint64_t itintr;
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if ((itintr = (*(uint64_t*) data) & (0xf<<4))) {
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@@ -199,43 +241,14 @@ TsunamiCChip::write(MemReqPtr &req, const uint8_t *data)
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}
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supportedWrite = true;
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}
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//If it is 12th-15th bit, IPI sent to Processor 1
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uint64_t ipreq;
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if ((ipreq = (*(uint64_t*) data) & (0xf << 12))) {
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//Set the bits in IPINTR
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misc |= (ipreq >> 4);
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for (int i=0; i < size; i++) {
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if ((ipreq & (1 << (i + 12)))) {
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if (!ipiInterrupting[i])
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tsunami->intrctrl->post(i, TheISA::INTLEVEL_IRQ3, 0);
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ipiInterrupting[i]++;
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DPRINTF(IPI, "send cpu=%d pending=%d from=%d\n", i,
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ipiInterrupting[i], req->cpu_num);
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}
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}
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supportedWrite = true;
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}
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//If it is bits 8-11, then clearing IPI's
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uint64_t ipintr;
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if ((ipintr = (*(uint64_t*) data) & (0xf << 8))) {
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//Clear the bits in IPINTR
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misc &= ~(ipintr);
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for (int i=0; i < size; i++) {
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if ((ipintr & (1 << (i + 8))) && ipiInterrupting[i]) {
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if (!(--ipiInterrupting[i]))
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tsunami->intrctrl->clear(i, TheISA::INTLEVEL_IRQ3, 0);
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DPRINTF(IPI, "clearing cpu=%d pending=%d from=%d\n", i,
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ipiInterrupting[i] + 1, req->cpu_num);
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}
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}
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supportedWrite = true;
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}
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// ignore NXMs
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if (*(uint64_t*)data & 0x10000000)
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supportedWrite = true;
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// ignore NXMs
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if (*(uint64_t*)data & 0x10000000)
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supportedWrite = true;
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if(!supportedWrite)
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panic("TSDEV_CC_MISC write not implemented\n");
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if(!supportedWrite) panic("TSDEV_CC_MISC write not implemented\n");
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return No_Fault;
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case TSDEV_CC_AAR0:
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case TSDEV_CC_AAR1:
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@@ -55,7 +55,7 @@ System::System(Params *p)
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kernelSymtab = new SymbolTable;
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consoleSymtab = new SymbolTable;
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debugSymbolTable = kernelSymtab;
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debugSymbolTable = new SymbolTable;
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/**
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* Load the kernel, pal, and console code into memory
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@@ -89,7 +89,6 @@ System::System(Params *p)
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// load symbols
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if (!kernel->loadGlobalSymbols(kernelSymtab))
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panic("could not load kernel symbols\n");
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debugSymbolTable = kernelSymtab;
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if (!kernel->loadLocalSymbols(kernelSymtab))
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panic("could not load kernel local symbols\n");
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@@ -97,6 +96,22 @@ System::System(Params *p)
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if (!console->loadGlobalSymbols(consoleSymtab))
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panic("could not load console symbols\n");
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if (!kernel->loadGlobalSymbols(debugSymbolTable))
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panic("could not load kernel symbols\n");
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if (!kernel->loadLocalSymbols(debugSymbolTable))
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panic("could not load kernel local symbols\n");
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if (!console->loadGlobalSymbols(debugSymbolTable))
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panic("could not load console symbols\n");
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if (!pal->loadGlobalSymbols(debugSymbolTable))
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panic("could not load pal symbols\n");
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if (!pal->loadLocalSymbols(debugSymbolTable))
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panic("could not load pal symbols\n");
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DPRINTF(Loader, "Kernel start = %#x\n", kernelStart);
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DPRINTF(Loader, "Kernel end = %#x\n", kernelEnd);
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DPRINTF(Loader, "Kernel entry = %#x\n", kernelEntry);
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