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arch: cpu: Stop passing around misc registers by reference.

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These values are all basic integers (specifically uint64_t now), and
so passing them by const & is actually less efficient since there's a
extra level of indirection and an extra value, and the same sized value
(a 64 bit pointer vs. a 64 bit int) is being passed around.

Change-Id: Ie9956b8dc4c225068ab1afaba233ec2b42b76da3
Reviewed-on: https://gem5-review.googlesource.com/c/13626
Maintainer: Gabe Black <gabeblack@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
This commit is contained in:
Gabe Black
2018-10-18 17:34:08 -07:00
parent 774770a641
commit 230b892fa3
23 changed files with 58 additions and 68 deletions
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10
src/cpu/thread_context.hh
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@@ -278,9 +278,9 @@ class ThreadContext
virtual RegVal readMiscReg(int misc_reg) = 0;
virtual void setMiscRegNoEffect(int misc_reg, const RegVal &val) = 0;
virtual void setMiscRegNoEffect(int misc_reg, RegVal val) = 0;
virtual void setMiscReg(int misc_reg, const RegVal &val) = 0;
virtual void setMiscReg(int misc_reg, RegVal val) = 0;
virtual RegId flattenRegId(const RegId& regId) const = 0;
@@ -291,7 +291,7 @@ class ThreadContext
}
virtual void
setRegOtherThread(const RegId& misc_reg, const RegVal &val, ThreadID tid)
setRegOtherThread(const RegId& misc_reg, RegVal val, ThreadID tid)
{
}
@@ -541,10 +541,10 @@ class ProxyThreadContext : public ThreadContext
RegVal readMiscReg(int misc_reg)
{ return actualTC->readMiscReg(misc_reg); }
void setMiscRegNoEffect(int misc_reg, const RegVal &val)
void setMiscRegNoEffect(int misc_reg, RegVal val)
{ return actualTC->setMiscRegNoEffect(misc_reg, val); }
void setMiscReg(int misc_reg, const RegVal &val)
void setMiscReg(int misc_reg, RegVal val)
{ return actualTC->setMiscReg(misc_reg, val); }
RegId flattenRegId(const RegId& regId) const