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arch: cpu: Stop passing around misc registers by reference.

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These values are all basic integers (specifically uint64_t now), and
so passing them by const & is actually less efficient since there's a
extra level of indirection and an extra value, and the same sized value
(a 64 bit pointer vs. a 64 bit int) is being passed around.

Change-Id: Ie9956b8dc4c225068ab1afaba233ec2b42b76da3
Reviewed-on: https://gem5-review.googlesource.com/c/13626
Maintainer: Gabe Black <gabeblack@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
This commit is contained in:
Gabe Black
2018-10-18 17:34:08 -07:00
parent 774770a641
commit 230b892fa3
23 changed files with 58 additions and 68 deletions
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4
src/cpu/o3/thread_context_impl.hh
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@@ -307,7 +307,7 @@ O3ThreadContext<Impl>::flattenRegId(const RegId& regId) const
template <class Impl>
void
O3ThreadContext<Impl>::setMiscRegNoEffect(int misc_reg, const RegVal &val)
O3ThreadContext<Impl>::setMiscRegNoEffect(int misc_reg, RegVal val)
{
cpu->setMiscRegNoEffect(misc_reg, val, thread->threadId());
@@ -317,7 +317,7 @@ O3ThreadContext<Impl>::setMiscRegNoEffect(int misc_reg, const RegVal &val)
#endif//__CPU_O3_THREAD_CONTEXT_IMPL_HH__
template <class Impl>
void
O3ThreadContext<Impl>::setMiscReg(int misc_reg, const RegVal &val)
O3ThreadContext<Impl>::setMiscReg(int misc_reg, RegVal val)
{
cpu->setMiscReg(misc_reg, val, thread->threadId());