derek/gem5
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

cpu: O3 rename using the flatIndex instead of index

Browse Source 
This patch is replacing the RegId::index with RegId::flatIndex so that
it provides a valid register number when used by a VecElem register.

Change-Id: I5b000abb9457cd325c2a3021e772a75ea33d8a4c
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/15600
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
This commit is contained in:
Giacomo Travaglini
2019-01-10 17:28:05 +00:00
parent 47fd797f1e
commit 204e932607
1 changed files with 4 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
src/cpu/o3/rename_map.cc
View File

@@ -76,14 +76,14 @@ SimpleRenameMap::rename(const RegId& arch_reg)
PhysRegIdPtr renamed_reg;
// Record the current physical register that is renamed to the
// requested architected register.
PhysRegIdPtr prev_reg = map[arch_reg.index()];
PhysRegIdPtr prev_reg = map[arch_reg.flatIndex()];
// If it's not referencing the zero register, then rename the
// register.
if (arch_reg != zeroReg) {
renamed_reg = freeList->getReg();
map[arch_reg.index()] = renamed_reg;
map[arch_reg.flatIndex()] = renamed_reg;
} else {
// Otherwise return the zero register so nothing bad happens.
assert(prev_reg->isZeroReg());
@@ -92,8 +92,8 @@ SimpleRenameMap::rename(const RegId& arch_reg)
DPRINTF(Rename, "Renamed reg %d to physical reg %d (%d) old mapping was"
" %d (%d)\n",
arch_reg, renamed_reg->index(), renamed_reg->flatIndex(),
prev_reg->index(), prev_reg->flatIndex());
arch_reg, renamed_reg->flatIndex(), renamed_reg->flatIndex(),
prev_reg->flatIndex(), prev_reg->flatIndex());
return RenameInfo(renamed_reg, prev_reg);
}