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dev-arm: Remove SPI/PPI range check in Gicv3 class

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This is not needed since the check will already happen within

* Gicv3Distributor::sendInt
* Gicv3Redistributor::sendPPInt

Change-Id: I1355bde367127513f0501aa19e8f68d302c7a4f4
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31514
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Giacomo Travaglini
2020-07-17 14:27:19 +01:00
parent 06a408f9c6
commit 1ce7083820
1 changed files with 0 additions and 4 deletions
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4
src/dev/arm/gic_v3.cc
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@@ -172,8 +172,6 @@ Gicv3::write(PacketPtr pkt)
void
Gicv3::sendInt(uint32_t int_id)
{
panic_if(int_id < Gicv3::SGI_MAX + Gicv3::PPI_MAX, "Invalid SPI!");
panic_if(int_id >= Gicv3::INTID_SECURE, "Invalid SPI!");
DPRINTF(Interrupt, "Gicv3::sendInt(): received SPI %d\n", int_id);
distributor->sendInt(int_id);
}
@@ -188,8 +186,6 @@ void
Gicv3::sendPPInt(uint32_t int_id, uint32_t cpu)
{
panic_if(cpu >= redistributors.size(), "Invalid cpuID sending PPI!");
panic_if(int_id < Gicv3::SGI_MAX, "Invalid PPI!");
panic_if(int_id >= Gicv3::SGI_MAX + Gicv3::PPI_MAX, "Invalid PPI!");
DPRINTF(Interrupt, "Gicv3::sendPPInt(): received PPI %d cpuTarget %#x\n",
int_id, cpu);
redistributors[cpu]->sendPPInt(int_id);