arch-vega: Add missing functions referenced by insts

Some instructions were referencing pc() and isExecMaskRegister() which
were not defined.

Change-Id: Ic5b3fa9057950ff85603fcb87447a81b6c7f274b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/47103
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>

src/arch/amdgpu/vega/insts/gpu_static_inst.hh

@@ -60,6 +60,12 @@ namespace VegaISA
             return isFlatScratchReg(opIdx);
         }
 
+        bool
+        isExecMaskRegister(int opIdx) override
+        {
+            return isExecMask(opIdx);
+        }
+
         void initOperandInfo() override { return; }
         int getOperandSize(int opIdx) override { return 0; }
 

src/gpu-compute/gpu_dyn_inst.cc

@@ -284,6 +284,18 @@ GPUDynInst::seqNum() const
     return _seqNum;
 }
 
+Addr
+GPUDynInst::pc()
+{
+    return wavefront()->pc();
+}
+
+void
+GPUDynInst::pc(Addr _pc)
+{
+    wavefront()->pc(_pc);
+}
+
 enums::StorageClassType
 GPUDynInst::executedAs()
 {

src/gpu-compute/gpu_dyn_inst.hh

@@ -162,6 +162,9 @@ class GPUDynInst : public GPUExecContext
 
     InstSeqNum seqNum() const;
 
+    Addr pc();
+    void pc(Addr _pc);
+
     enums::StorageClassType executedAs();
 
     // virtual address for scalar memory operations