merged with ISA event manager fix

src/arch/alpha/isa.cc

@@ -36,7 +36,7 @@ namespace AlphaISA
 {
 
 void
-ISA::serialize(std::ostream &os)
+ISA::serialize(EventManager *em, std::ostream &os)
 {
     SERIALIZE_SCALAR(fpcr);
     SERIALIZE_SCALAR(uniq);
@@ -46,7 +46,7 @@ ISA::serialize(std::ostream &os)
 }
 
 void
-ISA::unserialize(Checkpoint *cp, const std::string &section)
+ISA::unserialize(EventManager *em, Checkpoint *cp, const std::string &section)
 {
     UNSERIALIZE_SCALAR(fpcr);
     UNSERIALIZE_SCALAR(uniq);

src/arch/alpha/isa.hh

@@ -83,8 +83,9 @@ namespace AlphaISA
             intr_flag = 0;
         }
 
-        void serialize(std::ostream &os);
-        void unserialize(Checkpoint *cp, const std::string &section);
+        void serialize(EventManager *em, std::ostream &os);
+        void unserialize(EventManager *em, Checkpoint *cp,
+                const std::string &section);
 
         void reset(std::string core_name, ThreadID num_threads,
                    unsigned num_vpes, BaseCPU *_cpu)

src/arch/arm/isa.hh

@@ -95,9 +95,10 @@ namespace ArmISA
             return reg;
         }
 
-        void serialize(std::ostream &os)
+        void serialize(EventManager *em, std::ostream &os)
         {}
-        void unserialize(Checkpoint *cp, const std::string &section)
+        void unserialize(EventManager *em, Checkpoint *cp,
+                const std::string &section)
         {}
 
         ISA()

src/arch/mips/isa.hh

@@ -172,8 +172,11 @@ namespace MipsISA
             return reg;
         }
 
-        void serialize(std::ostream &os);
-        void unserialize(Checkpoint *cp, const std::string &section);
+        void serialize(EventManager *em, std::ostream &os)
+        {}
+        void unserialize(EventManager *em, Checkpoint *cp,
+                const std::string &section)
+        {}
     };
 }
 

src/cpu/simple_thread.cc

@@ -199,6 +199,11 @@ SimpleThread::serialize(ostream &os)
     SERIALIZE_SCALAR(nextPC);
     SERIALIZE_SCALAR(nextNPC);
     // thread_num and cpu_id are deterministic from the config
+
+    // 
+    // Now must serialize all the ISA dependent state
+    //
+    isa.serialize(cpu, os);
 }
 
 
@@ -214,6 +219,11 @@ SimpleThread::unserialize(Checkpoint *cp, const std::string &section)
     UNSERIALIZE_SCALAR(nextPC);
     UNSERIALIZE_SCALAR(nextNPC);
     // thread_num and cpu_id are deterministic from the config
+
+    // 
+    // Now must unserialize all the ISA dependent state
+    //
+    isa.unserialize(cpu, cp, section);
 }
 
 #if FULL_SYSTEM

src/dev/mc146818.cc

@@ -207,6 +207,15 @@ MC146818::serialize(const string &base, ostream &os)
     arrayParamOut(os, base + ".clock_data", clock_data, sizeof(clock_data));
     paramOut(os, base + ".stat_regA", stat_regA);
     paramOut(os, base + ".stat_regB", stat_regB);
+
+    //
+    // save the timer tick and rtc clock tick values to correctly reschedule 
+    // them during unserialize
+    //
+    Tick rtcTimerInterruptTickOffset = event.when() - curTick;
+    SERIALIZE_SCALAR(rtcTimerInterruptTickOffset);
+    Tick rtcClockTickOffset = event.when() - curTick;
+    SERIALIZE_SCALAR(rtcClockTickOffset);
 }
 
 void
@@ -218,10 +227,15 @@ MC146818::unserialize(const string &base, Checkpoint *cp,
     paramIn(cp, section, base + ".stat_regA", stat_regA);
     paramIn(cp, section, base + ".stat_regB", stat_regB);
 
-    // We're not unserializing the event here, but we need to
-    // rescehedule the event since curTick was moved forward by the
-    // checkpoint
-    reschedule(event, curTick + event.interval);
+    //
+    // properly schedule the timer and rtc clock events
+    //
+    Tick rtcTimerInterruptTickOffset;
+    UNSERIALIZE_SCALAR(rtcTimerInterruptTickOffset);
+    reschedule(event, curTick + rtcTimerInterruptTickOffset);
+    Tick rtcClockTickOffset;
+    UNSERIALIZE_SCALAR(rtcClockTickOffset);
+    reschedule(tickEvent, curTick + rtcClockTickOffset);
 }
 
 MC146818::RTCEvent::RTCEvent(MC146818 * _parent, Tick i)