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fastmodel: Use BaseMMU in the CortexR52 wrapper

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Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Change-Id: I569dc66a9dad54a374b0864ef2ffabd114aede7b
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/37715
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Giacomo Travaglini
2020-11-18 14:51:49 +00:00
parent fc44c22d2d
commit 1569f5e5cd
2 changed files with 3 additions and 3 deletions
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4
src/arch/arm/fastmodel/CortexR52/thread_context.cc
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@@ -36,10 +36,10 @@ namespace FastModel
{
CortexR52TC::CortexR52TC(
::BaseCPU *cpu, int id, System *system, ::BaseTLB *dtb, ::BaseTLB *itb,
::BaseCPU *cpu, int id, System *system, ::BaseMMU *mmu,
::BaseISA *isa, iris::IrisConnectionInterface *iris_if,
const std::string &iris_path) :
ThreadContext(cpu, id, system, dtb, itb, isa, iris_if, iris_path)
ThreadContext(cpu, id, system, mmu, isa, iris_if, iris_path)
{}
bool

2
src/arch/arm/fastmodel/CortexR52/thread_context.hh
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@@ -44,7 +44,7 @@ class CortexR52TC : public Iris::ThreadContext
public:
CortexR52TC(::BaseCPU *cpu, int id, System *system,
::BaseTLB *dtb, ::BaseTLB *itb, ::BaseISA *isa,
::BaseMMU *mmu, ::BaseISA *isa,
iris::IrisConnectionInterface *iris_if,
const std::string &iris_path);