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dev-amdgpu: Fix GART PTE size

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The GART table is a legacy 1-level page table primarily used for
supervisor mode accesses to GPUs. The PTE size is 64-bits, not 32-bit.
This causes memory sizes >3GB (in X86) to fail loading amdgpu driver.

This changeset fixes the issue by setting the GART mappings to the
correct data type.

Change-Id: Ibfba2443675fe28316d26afa5f1a14885fdce40c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/65091
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
This commit is contained in:
Matthew Poremba
2022-10-30 11:48:56 -07:00
parent 7b16b17e61
commit 144ce7f12c
2 changed files with 2 additions and 2 deletions
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2
src/dev/amdgpu/amdgpu_device.cc
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@@ -270,7 +270,7 @@ AMDGPUDevice::writeFrame(PacketPtr pkt, Addr offset)
// Record the value
if (aperture == gpuvm.gartBase()) {
gpuvm.gartTable[aperture_offset] = pkt->getLE<uint32_t>();
gpuvm.gartTable[aperture_offset] = pkt->getUintX(ByteOrder::little);
DPRINTF(AMDGPUDevice, "GART translation %p -> %p\n", aperture_offset,
gpuvm.gartTable[aperture_offset]);
}

2
src/dev/amdgpu/amdgpu_vm.hh
View File

@@ -165,7 +165,7 @@ class AMDGPUVM : public Serializable
* Copy of GART table. Typically resides in device memory, however we use
* a copy in gem5 to simplify the interface.
*/
std::unordered_map<uint64_t, uint32_t> gartTable;
std::unordered_map<uint64_t, uint64_t> gartTable;
void readMMIO(PacketPtr pkt, Addr offset);
void writeMMIO(PacketPtr pkt, Addr offset);