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dev-arm: Fix PCI range in VExpress_GEM5_Foundation

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When we added the PCI mem range in the VExpress_GEM5_Foundation [1], we
meant to add a 256GiB region starting at 0x40 0000 0000.

By mistake the end address was set to 0x8 0000 0000 rather than
0x80 0000 0000

[1]: https://gem5-review.googlesource.com/c/public/gem5/+/44165

Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Change-Id: I848b8fee11fb742939c9343aae4ee5205aa836e4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/62511
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Giacomo Travaglini
2022-08-04 11:57:04 +01:00
parent 411e986a91
commit 0dc2a87666
1 changed files with 1 additions and 1 deletions
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2
src/dev/arm/RealView.py
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@@ -1635,7 +1635,7 @@ class VExpress_GEM5_Foundation(VExpress_GEM5_Base):
AddrRange(0x0C000000, 0x20000000),
# External AXI interface (PCI)
AddrRange(0x40000000, 0x80000000),
AddrRange(0x4000000000, 0x800000000),
AddrRange(0x4000000000, 0x8000000000),
]
sp810_fake = AmbaFake(pio_addr=0x1C020000, ignore_access=True)