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arch-x86: Remove static code from debug.isa and fix style.

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Fix style problems in debug.isa, and move static code out of the ISA
description into a plain header file.

Change-Id: I8369bd8d46ad11b66cac8249cc981a8d279a1492
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42347
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Gabe Black
2021-03-04 02:48:07 -08:00
parent 6142401b55
commit 090c22e631
4 changed files with 90 additions and 62 deletions
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2
src/arch/x86/insts/badmicroop.cc
View File

@@ -54,7 +54,7 @@ namespace X86ISA
// try to delete the static memory when it was destructed.
const StaticInstPtr badMicroop =
new X86ISAInst::MicroDebug(dummyMachInst, "panic", "BAD",
new MicroDebug(dummyMachInst, "panic", "BAD",
StaticInst::IsMicroop | StaticInst::IsLastMicroop,
new GenericISA::M5PanicFault("Invalid microop!"));

69
src/arch/x86/insts/microdebug.hh Normal file
View File

@@ -0,0 +1,69 @@
/*
* Copyright 2021 Google Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __ARCH_X86_INSTS_MICRODEBUG_HH__
#define __ARCH_X86_INSTS_MICRODEBUG_HH__
#include "arch/x86/insts/microop.hh"
namespace X86ISA
{
class MicroDebug : public X86ISA::X86MicroopBase
{
protected:
std::shared_ptr<GenericISA::M5DebugFault> fault;
public:
MicroDebug(ExtMachInst mach_inst, const char *mnem, const char *inst_mnem,
uint64_t set_flags, GenericISA::M5DebugFault *_fault) :
X86MicroopBase(mach_inst, mnem, inst_mnem, set_flags, No_OpClass),
fault(_fault)
{}
Fault
execute(ExecContext *xc, Trace::InstRecord *traceData) const override
{
return fault;
}
std::string
generateDisassembly(Addr pc,
const Loader::SymbolTable *symtab) const override
{
std::stringstream response;
printMnemonic(response, instMnem, mnemonic);
response << "\"" << fault->message() << "\"";
return response.str();
}
};
} // namespace X86ISA
#endif //__ARCH_X86_INSTS_MICRODEBUG_HH__

1
src/arch/x86/isa/includes.isa
View File

@@ -55,6 +55,7 @@ output header {{
#include "arch/generic/debugfaults.hh"
#include "arch/x86/emulenv.hh"
#include "arch/x86/insts/macroop.hh"
#include "arch/x86/insts/microdebug.hh"
#include "arch/x86/insts/microfpop.hh"
#include "arch/x86/insts/microldstop.hh"
#include "arch/x86/insts/micromediaop.hh"

80
src/arch/x86/isa/microops/debug.isa
View File

@@ -39,47 +39,6 @@
//
//////////////////////////////////////////////////////////////////////////
output header {{
class MicroDebug : public X86ISA::X86MicroopBase
{
protected:
std::shared_ptr<GenericISA::M5DebugFault> fault;
public:
MicroDebug(ExtMachInst _machInst, const char *mnem,
const char *instMnem, uint64_t setFlags,
GenericISA::M5DebugFault *_fault);
Fault
execute(ExecContext *xc, Trace::InstRecord *traceData) const override
{
return fault;
}
std::string
generateDisassembly(Addr pc,
const Loader::SymbolTable *symtab) const override
{
std::stringstream response;
printMnemonic(response, instMnem, mnemonic);
response << "\"" << fault->message() << "\"";
return response.str();
}
};
}};
output decoder {{
MicroDebug::MicroDebug(ExtMachInst _machInst, const char *mnem,
const char *instMnem, uint64_t setFlags,
GenericISA::M5DebugFault *_fault) :
X86ISA::X86MicroopBase(_machInst, mnem, instMnem,
setFlags, No_OpClass),
fault(_fault)
{}
}};
def template MicroDebugFlagsDeclare {{
class %(class_name)s : public %(base_class)s
{
@@ -90,36 +49,35 @@ def template MicroDebugFlagsDeclare {{
uint8_t cc;
public:
%(class_name)s(ExtMachInst _machInst, const char *mnem,
const char *instMnem, uint64_t setFlags,
GenericISA::M5DebugFault *_fault, uint8_t _cc);
%(class_name)s(ExtMachInst mach_inst, const char *mnem,
const char *inst_mnem, uint64_t set_flags,
GenericISA::M5DebugFault *_fault, uint8_t _cc);
Fault execute(ExecContext *, Trace::InstRecord *) const override;
};
}};
def template MicroDebugFlagsExecute {{
Fault
%(class_name)s::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
%(op_decl)s
%(op_rd)s
if (%(cond_test)s) {
return %(base_class)s::execute(xc, traceData);
} else {
return NoFault;
}
Fault
%(class_name)s::execute(ExecContext *xc,
Trace::InstRecord *trace_data) const
{
%(op_decl)s
%(op_rd)s
if (%(cond_test)s) {
return %(base_class)s::execute(xc, trace_data);
} else {
return NoFault;
}
}
}};
def template MicroDebugFlagsConstructor {{
%(class_name)s::%(class_name)s(
ExtMachInst machInst, const char *mnem,
const char *instMnem, uint64_t setFlags,
GenericISA::M5DebugFault *_fault, uint8_t _cc) :
%(base_class)s(machInst, mnem, instMnem, setFlags, _fault),
cc(_cc)
ExtMachInst mach_inst, const char *mnem, const char *inst_mnem,
uint64_t set_flags, GenericISA::M5DebugFault *_fault,
uint8_t _cc) :
%(base_class)s(mach_inst, mnem, inst_mnem, set_flags, _fault), cc(_cc)
{
%(set_reg_idx_arr)s;
%(constructor)s;
@@ -127,7 +85,7 @@ def template MicroDebugFlagsConstructor {{
}};
let {{
iop = InstObjParams("", "MicroDebugFlags", "MicroDebug",
iop = InstObjParams("", "MicroDebugFlags", "X86ISA::MicroDebug",
{"code": "",
"cond_test": "checkCondition(ccFlagBits | cfofBits | \
dfBit | ecfBit | ezfBit, cc)"})