Merge vm1.(none):/home/stever/bk/newmem-head
into vm1.(none):/home/stever/bk/newmem-cache2 --HG-- extra : convert_revision : 6f462916cb0eb309b6799e94fbf07629abb50eba
This commit is contained in:
@@ -53,7 +53,6 @@
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#include "arch/vtophys.hh"
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#include "base/callback.hh"
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#include "cpu/profile.hh"
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#include "mem/physical.hh"
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#include "sim/faults.hh"
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#include "sim/sim_events.hh"
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#include "sim/sim_exit.hh"
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@@ -38,7 +38,6 @@
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#include "config/full_system.hh"
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#include "cpu/thread_context.hh"
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#include "cpu/thread_state.hh"
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#include "mem/physical.hh"
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#include "mem/request.hh"
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#include "sim/byteswap.hh"
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#include "sim/eventq.hh"
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@@ -193,11 +193,12 @@ fixPacket(PacketPtr func, PacketPtr timing)
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func->flags |= SATISFIED;
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return false;
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} else {
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// In this case the timing packet only partially satisfies the
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// requset, so we would need more information to make this work.
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// Like bytes valid in the packet or something, so the request could
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// continue and get this bit of possibly newer data along with the
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// older data not written to yet.
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// In this case the timing packet only partially satisfies
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// the request, so we would need more information to make
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// this work. Like bytes valid in the packet or
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// something, so the request could continue and get this
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// bit of possibly newer data along with the older data
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// not written to yet.
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panic("Timing packet only partially satisfies the functional"
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"request. Now what?");
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}
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@@ -506,16 +506,18 @@ class Packet
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bool intersect(PacketPtr p);
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};
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/** This function given a functional packet and a timing packet either satisfies
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* the timing packet, or updates the timing packet to reflect the updated state
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* in the timing packet. It returns if the functional packet should continue to
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* traverse the memory hierarchy or not.
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/** This function given a functional packet and a timing packet either
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* satisfies the timing packet, or updates the timing packet to
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* reflect the updated state in the timing packet. It returns if the
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* functional packet should continue to traverse the memory hierarchy
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* or not.
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*/
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bool fixPacket(PacketPtr func, PacketPtr timing);
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/** This function is a wrapper for the fixPacket field that toggles the hasData bit
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* it is used when a response is waiting in the caches, but hasn't been marked as a
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* response yet (so the fixPacket needs to get the correct value for the hasData)
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/** This function is a wrapper for the fixPacket field that toggles
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* the hasData bit it is used when a response is waiting in the
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* caches, but hasn't been marked as a response yet (so the fixPacket
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* needs to get the correct value for the hasData)
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*/
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bool fixDelayedResponsePacket(PacketPtr func, PacketPtr timing);
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@@ -414,20 +414,7 @@ PhysicalMemory::MemoryPort::recvAtomic(PacketPtr pkt)
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void
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PhysicalMemory::MemoryPort::recvFunctional(PacketPtr pkt)
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{
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//Since we are overriding the function, make sure to have the impl of the
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//check or functional accesses here.
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std::list<std::pair<Tick,PacketPtr> >::iterator i = transmitList.begin();
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std::list<std::pair<Tick,PacketPtr> >::iterator end = transmitList.end();
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bool notDone = true;
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while (i != end && notDone) {
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PacketPtr target = i->second;
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// If the target contains data, and it overlaps the
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// probed request, need to update data
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if (target->intersect(pkt))
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notDone = fixPacket(pkt, target);
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i++;
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}
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checkFunctional(pkt);
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// Default implementation of SimpleTimingPort::recvFunctional()
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// calls recvAtomic() and throws away the latency; we can save a
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@@ -31,23 +31,32 @@
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#include "mem/tport.hh"
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void
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SimpleTimingPort::recvFunctional(PacketPtr pkt)
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SimpleTimingPort::checkFunctional(PacketPtr pkt)
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{
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std::list<std::pair<Tick,PacketPtr> >::iterator i = transmitList.begin();
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std::list<std::pair<Tick,PacketPtr> >::iterator end = transmitList.end();
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bool notDone = true;
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DeferredPacketIterator i = transmitList.begin();
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DeferredPacketIterator end = transmitList.end();
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while (i != end && notDone) {
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PacketPtr target = i->second;
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while (i != end) {
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PacketPtr target = i->pkt;
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// If the target contains data, and it overlaps the
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// probed request, need to update data
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if (target->intersect(pkt))
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notDone = fixPacket(pkt, target);
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if (target->intersect(pkt)) {
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if (!fixPacket(pkt, target)) {
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// fixPacket returns true for continue, false for done
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return;
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}
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}
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i++;
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}
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}
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//Then just do an atomic access and throw away the returned latency
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void
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SimpleTimingPort::recvFunctional(PacketPtr pkt)
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{
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checkFunctional(pkt);
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// Just do an atomic access and throw away the returned latency
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if (pkt->result != Packet::Success)
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recvAtomic(pkt);
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}
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@@ -67,12 +76,9 @@ SimpleTimingPort::recvTiming(PacketPtr pkt)
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pkt->makeTimingResponse();
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sendTiming(pkt, latency);
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}
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else {
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if (pkt->cmd != MemCmd::UpgradeReq)
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{
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delete pkt->req;
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delete pkt;
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}
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else if (pkt->cmd != MemCmd::UpgradeReq) {
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delete pkt->req;
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delete pkt;
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}
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return true;
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}
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@@ -81,12 +87,12 @@ void
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SimpleTimingPort::recvRetry()
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{
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assert(!transmitList.empty());
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if (Port::sendTiming(transmitList.front().second)) {
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if (Port::sendTiming(transmitList.front().pkt)) {
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transmitList.pop_front();
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DPRINTF(Bus, "No Longer waiting on retry\n");
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if (!transmitList.empty()) {
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Tick time = transmitList.front().first;
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sendEvent.schedule(time <= curTick ? curTick+1 : time);
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Tick time = transmitList.front().tick;
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sendEvent->schedule(time <= curTick ? curTick+1 : time);
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}
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}
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@@ -101,29 +107,29 @@ SimpleTimingPort::sendTiming(PacketPtr pkt, Tick time)
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{
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// Nothing is on the list: add it and schedule an event
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if (transmitList.empty()) {
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assert(!sendEvent.scheduled());
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sendEvent.schedule(curTick+time);
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transmitList.push_back(std::pair<Tick,PacketPtr>(time+curTick,pkt));
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assert(!sendEvent->scheduled());
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sendEvent->schedule(curTick+time);
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transmitList.push_back(DeferredPacket(time+curTick, pkt));
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return;
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}
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// something is on the list and this belongs at the end
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if (time+curTick >= transmitList.back().first) {
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transmitList.push_back(std::pair<Tick,PacketPtr>(time+curTick,pkt));
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if (time+curTick >= transmitList.back().tick) {
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transmitList.push_back(DeferredPacket(time+curTick, pkt));
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return;
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}
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// Something is on the list and this belongs somewhere else
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std::list<std::pair<Tick,PacketPtr> >::iterator i = transmitList.begin();
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std::list<std::pair<Tick,PacketPtr> >::iterator end = transmitList.end();
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DeferredPacketIterator i = transmitList.begin();
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DeferredPacketIterator end = transmitList.end();
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bool done = false;
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while (i != end && !done) {
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if (time+curTick < i->first) {
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if (time+curTick < i->tick) {
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if (i == transmitList.begin()) {
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//Inserting at begining, reschedule
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sendEvent.reschedule(time+curTick);
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sendEvent->reschedule(time+curTick);
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}
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transmitList.insert(i,std::pair<Tick,PacketPtr>(time+curTick,pkt));
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transmitList.insert(i, DeferredPacket(time+curTick, pkt));
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done = true;
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}
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i++;
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@@ -132,20 +138,20 @@ SimpleTimingPort::sendTiming(PacketPtr pkt, Tick time)
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}
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void
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SimpleTimingPort::SendEvent::process()
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SimpleTimingPort::processSendEvent()
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{
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assert(port->transmitList.size());
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assert(port->transmitList.front().first <= curTick);
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if (port->Port::sendTiming(port->transmitList.front().second)) {
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assert(transmitList.size());
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assert(transmitList.front().tick <= curTick);
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if (Port::sendTiming(transmitList.front().pkt)) {
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//send successful, remove packet
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port->transmitList.pop_front();
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if (!port->transmitList.empty()) {
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Tick time = port->transmitList.front().first;
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schedule(time <= curTick ? curTick+1 : time);
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transmitList.pop_front();
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if (!transmitList.empty()) {
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Tick time = transmitList.front().tick;
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sendEvent->schedule(time <= curTick ? curTick+1 : time);
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}
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if (port->transmitList.empty() && port->drainEvent) {
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port->drainEvent->process();
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port->drainEvent = NULL;
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if (transmitList.empty() && drainEvent) {
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drainEvent->process();
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drainEvent = NULL;
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}
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return;
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}
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@@ -58,9 +58,26 @@
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class SimpleTimingPort : public Port
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{
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protected:
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/** A deferred packet, buffered to transmit later. */
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class DeferredPacket {
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public:
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Tick tick; ///< The tick when the packet is ready to transmit
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PacketPtr pkt; ///< Pointer to the packet to transmit
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DeferredPacket(Tick t, PacketPtr p)
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: tick(t), pkt(p)
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{}
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};
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typedef std::list<DeferredPacket> DeferredPacketList;
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typedef std::list<DeferredPacket>::iterator DeferredPacketIterator;
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/** A list of outgoing timing response packets that haven't been
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* serviced yet. */
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std::list<std::pair<Tick,PacketPtr> > transmitList;
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DeferredPacketList transmitList;
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/** This function attempts to send deferred packets. Scheduled to
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* be called in the future via SendEvent. */
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void processSendEvent();
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/**
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* This class is used to implemented sendTiming() with a delay. When
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@@ -68,27 +85,19 @@ class SimpleTimingPort : public Port
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* When the event time expires it attempts to send the packet.
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* If it cannot, the packet sent when recvRetry() is called.
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**/
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class SendEvent : public Event
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{
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SimpleTimingPort *port;
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typedef EventWrapper<SimpleTimingPort, &SimpleTimingPort::processSendEvent>
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SendEvent;
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public:
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SendEvent(SimpleTimingPort *p)
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: Event(&mainEventQueue), port(p)
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{ }
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virtual void process();
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virtual const char *description()
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{ return "Future scheduled sendTiming event"; }
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};
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SendEvent sendEvent;
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Event *sendEvent;
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/** If we need to drain, keep the drain event around until we're done
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* here.*/
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Event *drainEvent;
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/** Check the list of buffered packets against the supplied
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* functional request. */
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void checkFunctional(PacketPtr funcPkt);
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/** Schedule a sendTiming() event to be called in the future.
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* @param pkt packet to send
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* @param time increment from now (in ticks) to send packet
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@@ -115,9 +124,13 @@ class SimpleTimingPort : public Port
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public:
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SimpleTimingPort(std::string pname, MemObject *_owner = NULL)
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: Port(pname, _owner), sendEvent(this), drainEvent(NULL)
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: Port(pname, _owner),
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sendEvent(new SendEvent(this)),
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drainEvent(NULL)
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{}
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~SimpleTimingPort() { delete sendEvent; }
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/** Hook for draining timing accesses from the system. The
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* associated SimObject's drain() functions should be implemented
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* something like this when this class is used:
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